对讲机常用术语 对讲机, 术语 [watermark] 监听（Monitor） 为接受弱小信号而采用的一种收听方式。
上传时间： 2013-11-21
上传用户：
嵌入式系统是一种应用范围非常广泛的系统。可以说除了桌面计算机和服务器外所有计算设备都属于嵌入式系统，例如从便携式音乐播放器到航天飞机上的实时系统控制都属于嵌入式系统。 大多数商用的嵌入式系统都设计成专用任务的低成本的产品。大多数的嵌入式系统都具有实时性的要求。有些功能需要非常快的主频，但其他大多数功能并不需要高速的处理能力。这些系统通过特定的器件和软件来满足实时性的要求。 简单地通过速度和成本来定义嵌入式系统是困难的，但对于大批量的产品而言，成本常常对系统设计起决定作用。通常，一个嵌入式系统的很多部分相对系统主要功能来说需要较低的性能，因此嵌入式系统和通用PC相比，能够使用一个满足辅助功能的合适的CPU，从而简化了系统设计，降低了成本。例如，数字电视的机顶盒需要处理每秒以百万兆位计的连续数据，但这些数据处理大部分是由定制的硬件来实现的，如解析、管理和编解码多个频道的数字影像。 对于大批量生产的嵌入式系统，如便携式音乐播放器或手机等，降低成本就成为最主要的问题。这些系统通常只具有几个芯片：一个高度集成的CPU，一个定制的芯片用于控制其他所有的功能，还有一个存储芯片。在这种设计中，每部分都设计成使用最小的系统功耗。 对于小批量的嵌入式应用，为了降低开发成本，常常使用PC体系结构，通过限制程序的执行时间或用一个实时操作系统来替换原先的操作系统。在这种情况下，可以使用一个或多个高性能的CPU来替换特殊用途的硬件。 嵌入式系统的软件通常运行在有限的硬件资源上：没有硬盘、操作系统、键盘或屏幕。软件一般都没有文件系统，如果有的话，也会采用Flash驱动器。如果有人机交互接口的话，也是一个小键盘或液晶显示器。硬件是计算机的物理部分，和存储在硬件中的计算机软件程序和数据区分开来。 嵌入到机械中的嵌入式系统需要长期无故障连续运行，因此它的软件需要比PC中的软件更加仔细地开发和更加严格地测试。 那么，到底什么是嵌入式系统呢？ 根据IEEE（国际电气和电子工程师协会）的定义，嵌入式系统是“控制、监视或者辅助设备、机器和车间运行的装置”（原文为devices used to control，Monitor，or assist the operation of equipment，machinery or plants）。这主要是从应用上加以定义的，从中可以看出嵌入式系统是软件和硬件的综合体，还可以涵盖机械等附属装置。 目前国内一个普遍被认同的定义是：以应用为中心、以计算机技术为基础，软件 硬件可裁剪，适应应用系统对功能、可靠性、成本、体积、功耗严格要求的专用计算机系统。 可以这样认为，嵌入式系统是一种专用的计算机系统，作为装置或设备的一部分。通常，嵌入式系统是一个控制程序存储在ROM中的嵌入式处理器控制板。事实上，所有带有数字接口的设备，如手表、微波炉、录像机、汽车等，都使用嵌入式系统，有些嵌入式系统还包含操作系统，但大多数嵌入式系统都是由单个程序实现整个控制逻辑。 本书是按照人事部、信息产业部全国计算机技术与软件专业技术资格（水平）考试要求编写，内容紧扣《嵌入式系统设计考试大钢》。全书共六章，分别对嵌入式系统基础知识、嵌入式微处理器与接口设计、嵌入式软件与操作系统、嵌入式软件程序设计、嵌入式系统设计与维护等知识进行了详细的讲解。最后介绍了一个典型的嵌入式系统设计案例。 本书内容丰富，结构合理，概念清晰。既可作为全国计算机技术与软件专业技术资格（水平）考试中嵌入式系统设计师级别的考试用书，供有关考生学习使用，也可作为本科生嵌入式系统相关课程教材或培训书使用。
上传时间： 2013-10-29
上传用户：dongqiangqiang
6小时学会labview, labview Six Hour Course – Instructor Notes This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature Monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI. The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.
标签： labview
上传时间： 2013-10-13
上传用户：zjwangyichao
Abstract: Most hand-held products lack accurate battery-charge Monitors ("fuel gauges") because of the misconception that an accurate fuel gauge is difficult to achieve. This article debunks the myths and discusses how to accurately Monitor charge at all temperatures, charge and discharge rates, and aging conditions. 无线通信和数据在新一代手机和PDA中的融合为再一次的生产力飞跃创造了条件。。随之而来的将是经济的增长和全新的工作方式，在便携式计算机领域，PC笔记本曾经扮演了类似的开拓者角角。
上传时间： 2013-10-17
上传用户：erkuizhang
Abstract: Most hand-held products lack accurate battery-charge Monitors ("fuel gauges") because of the misconception that an accurate fuel gauge is difficult to achieve. This article debunks the myths and discusses how to accurately Monitor charge at all temperatures, charge and discharge rates, and aging conditions.
上传时间： 2014-03-18
上传用户：wenwiang
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance Monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-23
上传用户：shen_dafa
SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily Monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?
上传时间： 2013-10-20
上传用户：磊子226
Altera recommends the following system configuration: * Pentium II 400 with 512-MB system memory (faster systems give better software performance) * SVGA Monitor * CD-ROM drive * One or more of the following I/O ports: - USB port (if using Windows XP or Windows 2000) for USB-Blaster(TM) or MasterBlaster(TM) communications cables, or APU programming unit - Parallel port for ByteBlasterMV(TM) or ByteBlaster(TM) II download cables - Serial port for MasterBlaster communications cable * TCP/IP networking protocol installed * Windows 2000, Windows NT 4.0 with Service Pack 3 or later, or Windows XP * Internet Explorer 5.0 or later Memory & Disk Space Requirements USB开发
标签： system configuration recommends following
上传时间： 2015-03-27
上传用户：13188549192
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simulator may be used to Monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 and PORT3.1 This ARM Example may be debugged using only the uVision Simulator and your PC--no additional hardware or evaluation boards are required. The Simulator provides cycle-accurate simulation of all on-chip peripherals of the ADuC7000 device series. You may create various input signals like digital pulses, sine waves, sawtooth waves, and square waves using signal functions which you write in C. Signal functions run in the background in the simulator within timing constraints you configure. In this example, several signal functions are defined in the included Startup_SIM.INI file.
标签： the Analyzer Compiler project
上传时间： 2013-12-19
上传用户：Yukiseop
Displays CPU time usage, the list of processes (can be terminated) and the task which are running (can be close or switch to). Plus a little net traffic Monitor and a disk status report.
标签： terminated the processes Displays
上传时间： 2013-12-25
上传用户：zgu489
