This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL MODELswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP MODELs are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
上传时间： 2014-12-23
上传用户：xinhaoshan2016
模拟集成电路的设计与其说是一门技术，还不如说是一门艺术。它比数字集成电路设计需要更严格的分析和更丰富的直觉。严谨坚实的理论无疑是严格分析能力的基石，而设计者的实践经验无疑是诞生丰富直觉的源泉。这也正足初学者对学习模拟集成电路设计感到困惑并难以驾驭的根本原因。.美国加州大学洛杉机分校(UCLA)Razavi教授凭借着他在美国多所著名大学执教多年的丰富教学经验和在世界知名顶级公司(AT&T，Bell Lab，HP)卓著的研究经历为我们提供了这本优秀的教材。本书自2000午出版以来得到了国内外读者的好评和青睐，被许多国际知名大学选为教科书。同时，由于原著者在世界知名顶级公司的丰富研究经历，使本书也非常适合作为CMOS模拟集成电路设计或相关领域的研究人员和工程技术人员的参考书。... 本书介绍模拟CMOS集成电路的分析与设计。从直观和严密的角度阐述了各种模拟电路的基本原理和概念，同时还阐述了在SOC中模拟电路设计遇到的新问题及电路技术的新发展。本书由浅入深，理论与实际结合，提供了大量现代工业中的设计实例。全书共18章。前10章介绍各种基本模块和运放及其频率响应和噪声。第11章至第13章介绍带隙基准、开关电容电路以及电路的非线性和失配的影响，第14、15章介绍振荡器和锁相环。第16章至18章介绍MOS器件的高阶效应及其模型、CMOS制造工艺和混合信号电路的版图与封装。 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device MODELs 17 CMOS Processing Technology 18 Layout and Packaging
上传时间： 2014-12-23
上传用户：杜莹12345
Hyperlynx仿真应用:阻抗匹配.下面以一个电路设计为例，简单介绍一下PCB仿真软件在设计中的使用。下面是一个DSP硬件电路部分元件位置关系(原理图和PCB使用PROTEL99SE设计)，其中DRAM作为DSP的扩展Memory(64位宽度，低8bit还经过3245接到FLASH和其它芯片)，DRAM时钟频率133M。因为频率较高，设计过程中我们需要考虑DRAM的数据、地址和控制线是否需加串阻。下面，我们以数据线D0仿真为例看是否需要加串阻。模型建立首先需要在元件公司网站下载各器件IBIS模型。然后打开Hyperlynx,新建LineSim File(线路仿真—主要用于PCB前仿真验证)新建好的线路仿真文件里可以看到一些虚线勾出的传输线、芯片脚、始端串阻和上下拉终端匹配电阻等。下面，我们开始导入主芯片DSP的数据线D0脚模型。左键点芯片管脚处的标志，出现未知管脚，然后再按下图的红线所示线路选取芯片IBIS模型中的对应管脚。 3http://bbs.elecfans.com/ 电子技术论坛 http://www.elecfans.com 电子发烧友点OK后退到“ASSIGN MODELs”界面。选管脚为“Output”类型。这样，一样管脚的配置就完成了。同样将DRAM的数据线对应管脚和3245的对应管脚IBIS模型加上(DSP输出，3245高阻，DRAM输入)。下面我们开始建立传输线模型。左键点DSP芯片脚相连的传输线，增添传输线，然后右键编辑属性。因为我们使用四层板，在表层走线，所以要选用“Microstrip”，然后点“Value”进行属性编辑。这里，我们要编辑一些PCB的属性，布线长度、宽度和层间距等，属性编辑界面如下：再将其它传输线也添加上。这就是没有加阻抗匹配的仿真模型(PCB最远直线间距1.4inch，对线长为1.7inch)。现在模型就建立好了。仿真及分析下面我们就要为各点加示波器探头了，按照下图红线所示路径为各测试点增加探头：为发现更多的信息，我们使用眼图观察。因为时钟是133M，数据单沿采样，数据翻转最高频率为66.7M，对应位宽为7.58ns。所以设置参数如下：之后按照芯片手册制作眼图模板。因为我们最关心的是接收端(DRAM)信号，所以模板也按照DRAM芯片HY57V283220手册的输入需求设计。芯片手册中要求输入高电平VIH高于2.0V，输入低电平VIL低于0.8V。DRAM芯片的一个NOTE里指出，芯片可以承受最高5.6V，最低-2.0V信号(不长于3ns)：按下边红线路径配置眼图模板：低8位数据线没有串阻可以满足设计要求，而其他的56位都是一对一，经过仿真没有串阻也能通过。于是数据线不加串阻可以满足设计要求，但有一点需注意，就是写数据时因为存在回冲，DRAM接收高电平在位中间会回冲到2V。因此会导致电平判决裕量较小，抗干扰能力差一些，如果调试过程中发现写RAM会出错，还需要改版加串阻。
上传时间： 2013-11-05
上传用户：dudu121
Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal MODELs are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.
上传时间： 2013-11-10
上传用户：1595690
MPLAB C30用户指南(英文) HIGHLIGHTSThe information covered in this chapter is as follows:• About this Guide• Recommended Reading• Troubleshooting• The Microchip Web Site• Development Systems Customer Notification Service• Customer Support Document LayoutThe document layout is as follows:• Chapter 1: Compiler Overview – describes MPLAB C30, development tools andfeature set.• Chapter 2: Differences between MPLAB C30 and ANSI C – describes thedifferences between the C language supported by MPLAB C30 syntax and thestandard ANSI-89 C.• Chapter 3: Using MPLAB C30 – describes how to use the MPLAB C30 compilerfrom the command line.• Chapter 4: MPLAB C30 Runtime Environment – describes the MPLAB C30runtime model, including information on sections, initialization, memory MODELs, thesoftware stack and much more.• Chapter 5: Data Types – describes MPLAB C30 integer, floating point and pointerdata types.• Chapter 6: Device Support Files – describes the MPLAB C30 header and registerdefinition files, as well as how to use with SFR’s.• Chapter 7: Interrupts – describes how to use interrupts.• Chapter 8: Mixing Assembly Language and C Modules – provides guidelines tousing MPLAB C30 with MPLAB ASM30 assembly language modules.
上传时间： 2013-10-21
上传用户：13925096126
针对嵌入式机器视觉系统向独立化、智能化发展的要求，介绍了一种嵌入式视觉系统--智能相机。基于对智能相机体系结构、组成模块和图像采集、传输和处理技术的分析，对国内外的几款智能相机进行比较。综合技术发展现状，提出基于FPGA+DSP模式的硬件平台，并提出智能相机的发展方向。分析结果表明，该系统设计可以实现脱离PC运行，完成图像获取与分析，并作出相应输出。 Abstract: This paper introduced an embedded vision system-intelligent camera ，which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture， component modules and image acquisition， transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad， the paper proposed the hardware platform based on FPGA+DSP MODELs and made clear direction of development of intelligent cameras. On the analysis of the design， the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.
上传时间： 2013-10-24
上传用户：bvdragon
Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element MODELs andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed MODELs and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.
上传时间： 2014-03-25
上传用户：yyyyyyyyyy
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral MODELs. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
标签： Efficient Verilog Digital Coding
上传时间： 2013-11-23
上传用户：我干你啊
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL MODELswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP MODELs are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
上传时间： 2013-11-20
上传用户：pzw421125
针对嵌入式机器视觉系统向独立化、智能化发展的要求，介绍了一种嵌入式视觉系统--智能相机。基于对智能相机体系结构、组成模块和图像采集、传输和处理技术的分析，对国内外的几款智能相机进行比较。综合技术发展现状，提出基于FPGA+DSP模式的硬件平台，并提出智能相机的发展方向。分析结果表明，该系统设计可以实现脱离PC运行，完成图像获取与分析，并作出相应输出。 Abstract: This paper introduced an embedded vision system-intelligent camera ，which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture， component modules and image acquisition， transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad， the paper proposed the hardware platform based on FPGA+DSP MODELs and made clear direction of development of intelligent cameras. On the analysis of the design， the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.
上传时间： 2013-11-14
上传用户：无聊来刷下
