·SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling ver
标签: nbsp SystemVerilog Design for
上传时间: 2013-07-14
上传用户:ainimao
·HDL Chip Design
上传时间: 2013-06-18
上传用户:lizhen9880
·Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,Physical Compiler and Primetime
标签: nbsp Synthesis Advanced Synopsys
上传时间: 2013-04-24
上传用户:alia
资料->【E】光盘论文->【E5】英文书籍->Design and Analysis of Analog Filters (英).pdf
标签: Analysis Filters Design Analog
上传时间: 2013-04-24
上传用户:气温达上千万的
PCB Design Tutorial,不错的资料,免积分,欢迎各位下载啦,分享给大家。
上传时间: 2013-04-24
上传用户:kennyplds
Complete.PCB.Design.Using.OrCAD.Capture.and.PCB.Edito
标签: PCB Complete Capture Design
上传时间: 2013-06-28
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FPGA-based high-order FIR filter design
标签: FPGA-based high-order filter design
上传时间: 2013-08-06
上传用户:sssnaxie
Xilinx FPGA Design Tutorial
标签: Tutorial Xilinx Design FPGA
上传时间: 2013-08-07
上传用户:一诺88
Digital Down Converter Design based on FPGA.
标签: Converter Digital Design based
上传时间: 2013-08-13
上传用户:CSUSheep
这是关于如何使用Design Compiler_FPGA Design Flow 软件的说明书。
标签: Design Compiler_FPGA Flow 如何使用
上传时间: 2013-08-20
上传用户:chenxichenyue