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IMPLEMENT

在java程序中一个类实现接口类时用的关键词。ObjectIMPLEMENTsObject如java中定义的接口Animal,实现接口的类定义如下:publicclassTigerIMPLEMENTsAnimal。
  • 8位模拟数字转换器(ADC)的设计实现

    Abstract: This design idea explains how to IMPLEMENT an 8-bit analog-to-digital converter (ADC), using a microcontroller

    标签: ADC 8位 模拟数字转换器 设计实现

    上传时间: 2013-10-30

    上传用户:爱死爱死

  • 精密DAC和看门狗提高模拟输出安全

    Abstract: Using a DAC and a microprocessor supervisor, the system safety can be improved in industrial controllers, programmablelogiccontrollers (PLC), and data-acquisition systems. The analog output is set to zero-scale (or pin-programmable midscale) when amicroprocessor failure, optocoupler failure, or undervoltage condition occurs. A simple application is shown on how to IMPLEMENT thisfunction.

    标签: DAC 精密 看门狗 模拟

    上传时间: 2013-10-17

    上传用户:sjb555

  • VGA 8:1 multiplexer reference

    This reference design (RD) features a fullyassembled and tested surface-mount printed circuitboard (PCB). The RD board utilizes the MAX48851:2 or 2:1 multiplexer and other ICs to IMPLEMENT acomplete video graphics array (VGA) 8:1multiplexer.VGA input/output connections are provided to easilyinterface the MAX4885 RD board with VGAcompatibledevices. The RD board gives the optionto use a single 5V DC power supply (V+), or this RDboard can be powered from any one of the eight VGA sources.

    标签: multiplexer reference VGA

    上传时间: 2013-11-09

    上传用户:ANRAN

  • Design Safe Verilog State Machine(Synplicity)

      One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and IMPLEMENT them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final IMPLEMENTation of the state machine.

    标签: Synplicity Machine Verilog Design

    上传时间: 2013-10-23

    上传用户:司令部正军级

  • 降压升压型控制器简化手持式产品的DC/DC转换器设计

      A number of conventional solutions have been available forthe design of a DC/DC converter where the output voltageis within the input voltage range—a common scenarioin Li-Ion battery-powered applications—but none werevery attractive until now. Conventional topologies, suchas SEPIC or boost followed by buck, have numerousdisadvantages, including low effi ciency, complex magnetics,polarity inversion and/or circuit complexity/cost. TheLTC®3785 buck-boost controller yields a simple, effi cient,low parts-count, single-converter solution that is easyto IMPLEMENT, thus avoiding the drawbacks associatedwith traditional solutions.

    标签: DC 降压 升压型 控制器

    上传时间: 2013-10-21

    上传用户:ljt101007

  • LTC1325电池管理IC的使用

      For a variety of reasons, it is desirable to charge batteriesas rapidly as possible. At the same time, overchargingmust be limited to prolong battery life. Such limitation ofovercharging depends on factors such as the choice ofcharge termination technique and the use of multi-rate/multi-stage charging schemes. The majority of batterycharger ICs available today lock the user into one fixedcharging regimen, with at best a limited number ofcustomization options to suit a variety of application needsor battery types. The LTC®1325 addresses these shortcomingsby providing the user with all the functionalblocks needed to IMPLEMENT a simple but highly flexiblebattery charger (see Figure 1) which not only addressesthe issue of charging batteries but also those of batteryconditioning and capacity monitoring.

    标签: 1325 LTC IC的 电池管理

    上传时间: 2013-10-19

    上传用户:royzhangsz

  • MPC106 PCI Bridge/Memory Contr

    In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors IMPLEMENT the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically IMPLEMENTed on the device.

    标签: Bridge Memory Contr MPC

    上传时间: 2013-10-08

    上传用户:18711024007

  • P90CL301 I2C driver routines

    This application note shows how to write an Inter Integrated Circuit bus driver (I²C) for the Philips P90CL301micro-controller.It is not only an example of writing a driver, but it also includes a set of application interface software routines toquickly IMPLEMENT a complete I²C multi-master system application.For specific applications the user will have to make minimal changes in the driver program. Using the drivermeans linking modules to your application software and including a header-file into the application sourceprograms. A small example program of how to use the driver is listed.The driver supports i.a. polled or interrupt driven message handling, slave message transfers and multi-mastersystem applications. Furthermore, it is made suitable for use in conjunction with real time operating systems, likepSOS+.

    标签: routines driver P90 301

    上传时间: 2013-11-23

    上传用户:weixiao99

  • AN522: IMPLEMENTing Bus LVDS

    This application note describes how to IMPLEMENT the Bus LVDS (BLVDS) interface in the supported Altera ® device families for high-performance multipoint applications. This application note also shows the performance analysis of a multipoint application with the Cyclone III BLVDS example.

    标签: IMPLEMENTing LVDS 522 Bus

    上传时间: 2013-11-10

    上传用户:frank1234

  • XAPP122 - Spartan-XL FPGA的Express配置

    Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan™-XL family. The Express mode signals and their associated timing are defined.The steps of Express configuration are described in detail, followed by detailed instructions thatshow how to IMPLEMENT the configuration circui

    标签: Spartan-XL Express XAPP FPGA

    上传时间: 2014-12-28

    上传用户:hewenzhi