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GW-US

  • PCB纯手工设计

    学会不画电路图,不用网络表,用手工布线。从而加深对PCB电路版图设计的理解。

    标签: PCB

    上传时间: 2013-10-10

    上传用户:wang5829

  • 并网逆变器的控制

    随着传统能源成本不断增长,可替代能源持续受到青睐,如今它已不仅仅是减少环境污染的一种手段。可再生能源系统的新研发成果使之成为商业上可行的替代技术。当前最常用的可替代能源包括小型水轮机、风力发电机组和太阳能光伏发电。20年来,太阳能电能的使用量以每年20-25%的增幅稳定增长;近五年来,每年的增长速度将近50%。2001年,太阳能系统的装机容量还不到350 MW。而到2005年,太阳能光伏发电系统的发电量已达到1.460 GW。这一数字在2006年已增加到1.744 GW。并网系统的安装量已近两倍于离网型系统,导致这种现象的原因有两个:第一,大多数家庭和商业机构都使用公用电网。第二,大多数政府激励计划只面向并网系统。大部分并网应用都是“分布式”的,即系统安装在使用端。

    标签: 并网逆变器 控制

    上传时间: 2013-10-29

    上传用户:hanhanhan

  • 超声波US-100说明书及使用例程

    淘宝买的模块说明书,有代码,供参考

    标签: 100 US 超声波 说明书

    上传时间: 2013-11-18

    上传用户:wch1989

  • US-100超声波测距模块RS232底板使用说明

    标签: 100 232 US RS

    上传时间: 2013-10-10

    上传用户:448949

  • 瑞萨电子基于RX62T单片机的PMSM电机位置控制

      瑞萨电子基于RX62T单片机的PMSM电机位置控制英文资料:RX62T基于RX CPU架构,集成了增强的定时器单元(MTU3、GPT)、12位AD转换器(1μs转换时间),每个AD转换单元还集成可调增益运放和窗口比较器,适用于各种电机控制和变频器应用。最近瑞萨电子推出先进电机控制算法,其关键技术包括高级脉冲幅值调制技术、先进的电动机驱动技术等。基于RX62T高性能32位CISC MCU,使用瑞萨先进电机控制算法实现空调压缩机控制时,可以实现如下系统规格:适用空调器制冷量范围《8000W,低频振动最高振幅《300μm,压缩机转速范围为1~150rps,功率因数额定工况》0.9,满载高达100%,调制度《200%,电流检测方式为单电阻检测。它不但可以提供业界最精简的BOM,还可以在不增加BOM成本的情况下实现更多的功能。

    标签: PMSM 62T RX 62

    上传时间: 2013-10-20

    上传用户:ve3344

  • MSP430与CC2420示例

    本设计基于MSP430F161x/261x + CC2420/2520实验板,给出了物联网感知层的一些基本操作,包括传感器数据获取和低功耗无线数据通信两个方面。特别是对MSP430和CC2420/2520的配合给出了较为详细的说明及例程。由华东师范大学TI MSP430联合实验室提供。

    标签: 2420 MSP 430 CC

    上传时间: 2013-11-06

    上传用户:qw12

  • 三种单片机模拟串口方法介绍

    模拟串口就是利用51的两个输入输出引脚如P1.0和P1.1,置1或0分别代表高低电平,也就是串口通信中所说的位,如起始位用低电平,则将其置0,停止位为高电平,则将其置1,各种数据位和校验位则根据情况置1或置0。至于串口通信的波特率,说到底只是每位电平持续的时间,波特率越高,持续的时间越短。如波特率为9600BPS,即每一位传送时间为1000ms/9600=0.104ms,即位与位之间的延时为为0.104毫秒。单片机的延时是通过执行若干条指令来达到目的的,因为每条指令为1-3个指令周期,可即是通过若干个指令周期来进行延时的,单片机常用11.0592M的的晶振,现在我要告诉你这个奇怪数字的来历。用此频率则每个指令周期的时间为(12/11.0592)us,那么波特率为9600BPS每位要间融多少个指令周期呢?

    标签: 单片机 模拟串口

    上传时间: 2013-10-29

    上传用户:zw380105939

  • Freescale HCS12微控制器资料 ppt

     特点: • 8/10 位精度 • 7 us, 10-位单次转换时间. • 采样缓冲放大器 • 可编程采样时间 • 左/右 对齐, 有符号/无符号结果数据 • 外部触发控制 • 转换完成中断 • 模拟输入8通道复用 • 模拟/数字输入引脚复用 • 1到8转换序列长度 • 连续转换模式 • 多通道扫描方式

    标签: Freescale HCS 12

    上传时间: 2014-12-28

    上传用户:88mao

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    标签: Signal Input Fall Rise

    上传时间: 2013-10-23

    上传用户:copu

  • 介绍C16x系列微控制器的输入信号升降时序图及特性

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.

    标签: C16x 微控制器 输入信号 时序图

    上传时间: 2014-04-02

    上传用户:han_zh