SL811开发资料_包含源程序_电路图_芯片资料:SL811HS Embedded USB Host/Slave Controller.The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either Full-speed or low-speed USB peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed transceivers.The SL811HS supports and operates in USB Full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Internally,the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.
上传时间： 2013-12-22
上传用户：a82531317
very comprehensive example, windows WDM driver development ex The use of drive technology can s Say all ?� � e full speed equipm STM32 DAC DMA TIXINGBO Implement hiding process, make pr dma ddk driver
标签： comprehensive development technology example
上传时间： 2013-12-22
上传用户：虫虫虫虫虫虫
very comprehensive example, windows WDM driver development ex The use of drive technology can s Say all � � e full speed equipm STM32 DAC DMA TIXINGBO Implement hiding process, make pr dma ddk driver
标签： comprehensive development technology example
上传时间： 2013-12-14
上传用户：alan-ee
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For Full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
标签： technology 2.0 USB designed
上传时间： 2014-01-02
上传用户：二驱蚊器
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For Full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
标签： technology 2.0 USB designed
上传时间： 2017-07-05
上传用户：zhoujunzhen
AP3852 是一款拥有 CPU 和 DSP 双核的智能音频/语音处理芯片。芯片内置有 32 位 CPU 和 32 位 DSP 以及 2M FLASH，配合丰富的外围控制接口，非常适合各 种智能音频/语音处理系统。 该芯片配合菁音科技各种专利音频处理算法，能处理从声音输入、噪声消除、 音频预补偿、音效处理到声音回放的一个完整的音频通路；仅需配备简单的外围 器件即可组成高品质的音频输入/回放系统。能极大的提升产品的性能。 芯片内置 32Bits CPU，拥有良好的开发环境；内置 32Bits 音效处理 DSP，支 持浮点数运算、支持 FFT，方便各种进行各种算法编写；此外，为增加运算能力， 芯片还内置有一块专用的 Hardware Engine 单元，特别适合高速 FIR/IIR 运算。 芯片内置24Bits的Audio Codec，具有较高的SNR、THD。内置112KBytesSRAM； 内置 32 位 OTP Key，支持用户程序加密。 具有丰富的外围接口，包括 Full Speed USB Device、10Bits SAR ADC、SPI、I2C、 I2S、UART、GPIO 等。
上传时间： 2022-07-07
上传用户：
Universal Serial Bus Implementers Forum Full and Low Speed Electrical and Interoperability Compliance Test Procedure
标签： Interoperability Implementers Electrical Universal
上传时间： 2015-11-18
上传用户：cc1915
The XC226x derivatives are high-performance members of the Infineon XC2000 Family of full-feature single-chip CMOS microcontrollers. These devices extend the functionality and performance of the C166 Family in terms of instructions (MAC unit), peripherals, and speed. They combine high CPU performance (up to 80 million instructions per second) with extended peripheral functionality and enhanced IO capabilities. Optimized peripherals can be adapted flexibly to meet the application requirements. These derivatives utilize clock generation via PLL and internal or external clock sources. Onchip memory modules include program Flash, program RAM, and data RAM.
标签： high-performance full-feature derivatives Infineon
上传时间： 2016-12-12
上传用户：wab1981
Introduce High-Speed Digital System Design.
标签： High-Speed Digital Design System
上传时间： 2013-10-20
上传用户：gps6888
The TJA1042 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
标签： High-speed transce 1042 TJA
上传时间： 2014-12-28
上传用户：气温达上千万的
