ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
上传时间： 2013-11-12
上传用户：pans0ul
数字与模拟电路设计技巧IC与LSI的功能大幅提升使得高压电路与电力电路除外，几乎所有的电路都是由半导体组件所构成，虽然半导体组件高速、高频化时会有EMI的困扰，不过为了充分发挥半导体组件应有的性能，电路板设计与封装技术仍具有决定性的影响。 模拟与数字技术的融合由于IC与LSI半导体本身的高速化，同时为了使机器达到正常动作的目的，因此技术上的跨越竞争越来越激烈。虽然构成系统的电路未必有clock设计，但是毫无疑问的是系统的可靠度是建立在电子组件的选用、封装技术、电路设计与成本，以及如何防止噪讯的产生与噪讯外漏等综合考虑。机器小型化、高速化、多功能化使得低频/高频、大功率信号/小功率信号、高输出阻抗/低输出阻抗、大电流/小电流、模拟/数字电路，经常出现在同一个高封装密度电路板，设计者身处如此的环境必需面对前所未有的设计思维挑战，例如高稳定性电路与吵杂(noisy)性电路为邻时，如果未将噪讯入侵高稳定性电路的对策视为设计重点，事后反复的设计变更往往成为无解的梦魇。模拟电路与高速数字电路混合设计也是如此，假设微小模拟信号增幅后再将full scale 5V的模拟信号，利用10bit A/D转换器转换成数字信号，由于分割幅宽祇有4.9mV，因此要正确读取该电压level并非易事，结果造成10bit以上的A/D转换器面临无法顺利运作的窘境。另一典型实例是使用示波器量测某数字电路基板两点相隔10cm的ground电位，理论上ground电位应该是零，然而实际上却可观测到4.9mV数倍甚至数十倍的脉冲噪讯(pulse noise)，如果该电位差是由模拟与数字混合电路的grand所造成的话，要测得4.9 mV的信号根本是不可能的事情，也就是说为了使模拟与数字混合电路顺利动作，必需在封装与电路设计有相对的对策，尤其是数字电路switching时，ground vance noise不会入侵analogue ground的防护对策，同时还需充分检讨各电路产生的电流回路(route)与电流大小，依此结果排除各种可能的干扰因素。以上介绍的实例都是设计模拟与数字混合电路时经常遇到的瓶颈，如果是设计12bit以上A/D转换器时，它的困难度会更加复杂。
上传时间： 2013-11-16
上传用户：731140412
本文将接续介绍电源与功率电路基板，以及数字电路基板导线设计。宽带与高频电路基板导线设计a.输入阻抗1MHz，平滑性(flatness)50MHz 的OP增幅器电路基板图26 是由FET 输入的高速OP 增幅器OPA656 构成的高输入阻抗OP 增幅电路，它的gain取决于R1、R2，本电路图的电路定数为2 倍。此外为改善平滑性特别追加设置可以加大噪讯gain，抑制gain-频率特性高频领域时峰值的R3。图26 高输入阻抗的宽带OP增幅电路图27 是高输入阻抗OP 增幅器的电路基板图案。降低高速OP 增幅器反相输入端子与接地之间的浮游容量非常重要，所以本电路的浮游容量设计目标低于0.5pF。如果上述部位附着大浮游容量的话，会成为高频领域的频率特性产生峰值的原因，严重时频率甚至会因为feedback 阻抗与浮游容量，造成feedback 信号的位相延迟，最后导致频率特性产生波动现象。此外高输入阻抗OP 增幅器输入部位的浮游容量也逐渐成为问题，图27 的电路基板图案的非反相输入端子部位无full ground设计，如果有外部噪讯干扰之虞时，接地可设计成网格状(mesh)。图28 是根据图26 制成的OP 增幅器Gain－频率特性测试结果，由图可知即使接近50MHz频率特性非常平滑，-3dB cutoff频率大约是133MHz。
标签： PCB
上传时间： 2013-11-13
上传用户：hebanlian
We provide complete power solutions with a full lineup of power managementproducts. This brochure provides an overview of our high performance DC/DC switching regulatorcontrollers for applications including datacom, telecom, industrial, automotive, medical, avionicsand control systems. We make power design easier with our industry-leading field applicationengineering support; a broad selection of demonstration boards with schematics, layout filesand parts lists; SwitcherCAD® software for simulation, application notes and comprehensivetechnical documentation.
上传时间： 2013-10-15
上传用户：lz4v4
Power over Ethernet (PoE) is a new development thatallows for the delivery of power to Ethernet-based devicesvia standard Ethernet CAT5 cable, precluding the need forwall adapters or other external power sources. The PoEspecification defines a hardware detection protocol wherePower Sourcing Equipment (PSE) is able to identify PoEPowered Devices (PDs), thus allowing full backwardscompatibility with non-PoE-aware (legacy) Ethernetdevices.
上传时间： 2013-11-11
上传用户：daoyue
Piezoelectric motors are used in digital cameras for autofocus,zooming and optical image stabilization. Theyare relatively small, lightweight and effi cient, but theyalso require a complicated driving scheme. Traditionally,this challenge has been met with the use ofseparatecircuits, including a step-up converter and an oversizedgeneric full-bridge drive IC. The resulting high componentcount and large board space are especially problematicin the design of cameras for ever shrinking cell phones.The LT®3572 solves these problems by combining astep-up regulator and a dual full-bridge driver in a 4mm× 4mm QFN package. Figure 1 shows a typical LT3572Piezo motor drive circuit. A step-up converter is usedto generate 30V from a low voltage power source suchas a Li-Ion battery or any input power source within thepart’s wide input voltage range of 2.7V to 10V. The highoutput voltage of the step-up converter, adjustable upto 40V, is available for the drivers at the VOUT pin. Thedrivers operate in a full-bridge fashion, where the OUTAand OUTB pins are the same polarity as the PWMA andPWMB pins, respectively, and the OUTA and OUTB pinsare inverted from PWMA and PWMB, respectively. Thestep-up converter and both Piezo drivers have their ownshutdown control. Figure 2 shows a typical layout
上传时间： 2013-11-18
上传用户：hulee
Permission to make digital or hard copies of all or part of this work forpersonal or classroom use is granted without fee provided that copies arenot made or distributed for profit or commercial advantage and that copiesbear this notice and the full citation on the first page. To copy otherwise, torepublish, to post on servers or to redistribute to lists, requires prior specificpermission.
标签： 数字电源
上传时间： 2013-10-16
上传用户：dddddd
Features: High efficiency, high reliability, low cost AC input range selected by switch 100% full load burn-in test Protections: Short circuit / Over load Fixed switching frequency at 25KHz Cooling by free air convection 1 year warranty Dimensions: 199*98*38mm (L*W*H)
标签： Switchin Output Single SKS
上传时间： 2013-10-30
上传用户：taa123456
Keil C51是美国Keil Software公司出品的51系列兼容单片机C语言软件开发系统，与汇编相比，C语言在功能上、结构性、可读性、可维护性上有明显的优势，因而易学易用。Keil提供了包括C编译器、宏汇编、连接器、库管理和一个功能强大的仿真调试器等在内的完整开发方案，通过一个集成开发环境（uVision）将这些部分组合在一起。运行Keil软件需要WIN98、NT、WIN2000、WINXP等操作系统。如果你使用C语言编程，那么Keil几乎就是你的不二之选，即使不使用C语言而仅用汇编语言编程，其方便易用的集成环境、强大的软件仿真调试工具也会令你事半功倍。 解压缩以后安装，步骤如下： 1.打开up51v706a.txt(本文件)记下安装序列号。进入setup目录点击setup.exe进行安装； 2.选择Install Support....全新安装，以前没有安装过或者放弃以前的序列号安装; 选择Update Current Installation升级安装，将可以保持原来的序列号，不必再次输入 3.选择Full安装，Next->Yes(接受版权信息)->选择安装目录->Next->输入序列号、姓名、公司 等，除了序列号以外，都随意，可以如实输入你的姓名等。->next-> ....直到安装完成。 注意： 1.每次安装都必须进行这几步，每次都需要重新写入AddOn标识； 2.假如安装过程中存在病毒防火墙，可能会产生xcopy错误使安装失败，此时请先 关闭病毒防火墙，然后再安装; 3.安装前必须退出正在运行的Keil软件，否则也会产生xcopy错误使安装失败； 4.安装过程中可能会出现安装Secrity Key错误，点击确定即可。 这组安装码可以使用keil C51软件到2033年12月底，够用了吧。 Ident = Y1DZKM (这个号码已经输入在addon目录下的文件中，你不必理会了) SN = K1DZP-5IUSH-A01UE *************************************** 0xfd汉字补丁已经预先处理。安装以后可以打开工程\keil\c51\examples\0xfd\ee.uv2检验
上传时间： 2013-10-18
上传用户：takako_yang
为提高太阳能的利用率，以ATmega8单片机为控制核心，设计了一套光电跟踪与视日运动轨迹跟踪互补控制的双轴太阳跟踪器。该跟踪器在晴天时，利用光敏电阻采集光强判断太阳位置,控制步进电机实现光电跟踪；在阴天时，采集时钟器件PCF8583的时间信息,计算当前太阳位置来实现视日运动轨迹跟踪。实验表明：该太阳跟踪器能在不同天气状况下对太阳进行较准确地跟踪，能量接收效率提高了30%，达到充分利用太阳能的目的。 Abstract: To improve the utilization rate of solar energy，a kind of solar tracking controller which effectively combined the sun angle tracking and photo electric tracking based on ATmega8is designed.In the sunny days，the solar tracking con-troller determines the sun's position by using photosensitive resistances to collect light intensity and control stepper motors to achieve photo electric tracking，n cloudy days，it collects clock chip PCF8583time information to calculate the current position of the sun and achieve the sun angle tracking.Experimental results show the solar tracking controller accurately tracks the sun in different weather conditions，improves received energy efficiency by30%and reaches the purpose of full use of solar energy.
上传时间： 2013-10-15
上传用户：urgdil
