Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
标签： Considerations Guidelines and Design
上传时间： 2013-11-09
上传用户：ls530720646
使用Nios II软件构建工具 This chapter describes the Nios® II Software Build Tools (SBT), a set of utilities and scripts that creates and builds embedded C/C++ application projects, user library projects, and board support packages (BSPs). The Nios II SBT supports a repeatable, scriptable, and archivable process for creating your software product. You can invoke the Nios II SBT through either of the following user interfaces: ■ The Eclipse™ GUI ■ The Nios II Command Shell The purpose of this chapter is to make you familiar with the internal functionality of the Nios II SBT, independent of the user interface employed.
上传时间： 2013-10-12
上传用户：china97wan
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上传时间： 2013-11-21
上传用户：不懂夜的黑
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
上传时间： 2013-11-01
上传用户：wojiaohs
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
上传时间： 2013-11-23
上传用户：kangqiaoyibie
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-23
上传用户：shen_dafa
欢迎使用 PowerPCB 教程。本教程描述了 PADS-PowerPCB 的绝大部分功能和特点，以及使用的各个过程，这些功能包括： · 基本操作 · 建立元件(Component) · 建立板子边框线(Board outline) · 输入网表(Netlist) · 设置设计规则(Design Rule) · 元件(Part)的布局(Placement) · 手工和交互的布线 · SPECCTRA全自动布线器(Route Engine) · 覆铜(Copper Pour) · 建立分隔/混合平面层(Split/mixed Plane) · Microsoft的目标连接与嵌入(OLE)(Object Linking Embedding) · 可选择的装配选件(Assembly options) · 设计规则检查(Design Rule Check) · 反向标注(Back Annotation) · 绘图输出(Plot Output) 使用本教程后，你可以学到印制电路板设计和制造的许多基本知识。
上传时间： 2013-10-08
上传用户：x18010875091
针对传统集成电路（ASIC）功能固定、升级困难等缺点，利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块，在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波，给出了DQPSK解调的原理和实现方法，推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言编写出源程序，在Virtex-II Pro 开发板上成功实现了整个系统。测试结果表明该系统正确实现了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上传时间： 2013-11-19
上传用户：neu_liyan
【摘要】本文结合作者多年的印制板设计经验，着重印制板的电气性能，从印制板稳定性、可靠性方面，来讨论多层印制板设计的基本要求。【关键词】印制电路板；表面贴装器件；高密度互连；通孔【Key words】Printed Circuit Board；Surface Mounting Device；High Density Interface；Via一．概述印制板（PCB－Printed Circuit Board）也叫印制电路板、印刷电路板。多层印制板，就是指两层以上的印制板，它是由几层绝缘基板上的连接导线和装配焊接电子元件用的焊盘组成，既具有导通各层线路，又具有相互间绝缘的作用。随着SMT（表面安装技术）的不断发展，以及新一代SMD（表面安装器件）的不断推出，如QFP、QFN、CSP、BGA（特别是MBGA），使电子产品更加智能化、小型化，因而推动了PCB工业技术的重大改革和进步。自1991年IBM公司首先成功开发出高密度多层板（SLC）以来，各国各大集团也相继开发出各种各样的高密度互连（HDI）微孔板。这些加工技术的迅猛发展，促使了PCB的设计已逐渐向多层、高密度布线的方向发展。多层印制板以其设计灵活、稳定可靠的电气性能和优越的经济性能，现已广泛应用于电子产品的生产制造中。下面，作者以多年设计印制板的经验，着重印制板的电气性能，结合工艺要求，从印制板稳定性、可靠性方面，来谈谈多层制板设计的基本要领。
上传时间： 2013-10-08
上传用户：zhishenglu
讨论、研究高性能覆铜板对它所用的环氧树脂的性能要求，应是立足整个产业链的角度去观察、分析。特别应从HDI多层板发展对高性能CCL有哪些主要性能需求上着手研究。HDI多层板有哪些发展特点，它的发展趋势如何——这都是我们所要研究的高性能CCL发展趋势和重点的基本依据。而HDI多层板的技术发展，又是由它的应用市场——终端电子产品的发展所驱动（见图1）。 图1 在HDI多层板产业链中各类产品对下游产品的性能需求关系图 1．HDI多层板发展特点对高性能覆铜板技术进步的影响1.1 HDI多层板的问世，对传统PCB技术及其基板材料技术是一个严峻挑战20世纪90年代初，出现新一代高密度互连（High Density Interconnection，简称为 HDI）印制电路板——积层法多层板（Build—Up Multiplayer printed board，简称为 BUM）的最早开发成果。它的问世是全世界几十年的印制电路板技术发展历程中的重大事件。积层法多层板即HDI多层板，至今仍是发展HDI的PCB的最好、最普遍的产品形式。在HDI多层板之上，将最新PCB尖端技术体现得淋漓尽致。HDI多层板产品结构具有三大突出的特征：“微孔、细线、薄层化”。其中“微孔”是它的结构特点中核心与灵魂。因此，现又将这类HDI多层板称作为“微孔板”。HDI多层板已经历了十几年的发展历程，但它在技术上仍充满着朝气蓬勃的活力，在市场上仍有着前程广阔的空间。
上传时间： 2013-11-19
上传用户：zczc
