Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上传时间： 2013-11-21
上传用户：不懂夜的黑
针对传统集成电路（ASIC）功能固定、升级困难等缺点，利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块，在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波，给出了DQPSK解调的原理和实现方法，推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言编写出源程序，在Virtex-II Pro 开发板上成功实现了整个系统。测试结果表明该系统正确实现了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上传时间： 2013-11-19
上传用户：neu_liyan
本文利用Verilog HDL 语言自顶向下的设计方法设计多功能数字钟，突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点，并通过Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成综合、仿真。此程序通过下载到FPGA 芯片后，可应用于实际的数字钟显示中。 关键词：Verilog HDL；硬件描述语言；FPGA Abstract: In this paper, the process of designing multifunctional digital clock by the Verilog HDL top-down design method is presented, which has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Altera QuartusⅡ 4.1 and ModelSim SE 6.0. The program can be used in the truly digital clock display by downloading to the FPGA chip. Keywords: Verilog HDL；hardware description language；FPGA
上传时间： 2013-11-10
上传用户：hz07104032
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2014-01-24
上传用户：s363994250
华为pcb布线规范
上传时间： 2013-11-04
上传用户：gtzj
pkpm2005破解版安装方式： 一、Windows XP下PKPM的安装方法： 1. 先安装正版的 PKPM 。 2. 将本机的 system32\WinSCard.DLL 改名为 SysCard.DLL 。 3. 将本破解包里的 WinSCard.INI 复制到 C: 盘根目录。 4. 将本破解包里的 WinSCard.DLL 复制到系统system32目录。 5. 将本破解包里的 WinSCard.DLL 复制到pkpm里各模块目录下。 二、Win 7下PKPM的安装方法： 1.解压后有两个文件夹：（PKPM2005.12.17）和（PKPM2005.12.17综合破解方案） 先打开前一个文件夹安装正版的 PKPM 。 2. 打开后一个文件夹将本机的 system32\WinSCard.DLL 改名为 SysCard.DLL 。 3. 将本破解包里的 WinSCard.INI 复制到 C: 盘根目录。 4. 将本破解包里的 WinSCard.DLL 复制到系统system32目录。 5. 将本破解包里的 WinSCard.DLL 复制到pkpm里各模块目录下（就是安装好的程序中的所有文件夹）。 6。还有WinSCard.INI 复制到 C: 盘根目录需要在安全模式下进行。 注意：（windows7中修改系统文件需要获得TrustedInstaller权限，具体修改方法：在WINDOWS7下要删除某些文件或文件夹时提示“您需要TrustedInstaller提供的权限才能对此文件进行更改”，这种情况是因为我们在登陆系统时的管理员用户名无此文件的管理权限，而此文件的管理权限是“TrustedInstaller”这个用户，在控制面板的用户管理里面是看不到的。要想对这个文件或文件夹进行操作，可以用以下方法进行：在此文件或文件夹上点右键，选“属性”→“安全”，这时在“组或用户名”栏可以看到一个“TrustedInstaller”用户名，而登陆系统的管理员用户名没有此文件的“完全控制”权限，这时我们可以选择“高级”→“所有者”→“编辑”，在“将所有者更改为”栏中选择登陆系统的管理员用户名，然后点“应用”，这时出现“如果您刚获得此对象的所有权，在查看或更改权限之前，您将需关闭并重新打开此对象的属性”对话框，点“确定”，再点两个“确定”，在“安全”对话框中选“编辑”，出现了该文件或文件夹“的权限”对话框，在上面的栏中选中登陆系统的管理员用户名，在下面的栏中选择全部“允许”，然后点“应用”，再点两个“确定”，这时你就可以拥有该文件或文件夹的更改权限了。） 这里有两份破解包，虽然有些文件相同，但针对不同用户，可能一个包不能破解，所以推出两包破解综合方案，这两个包文件名分别为：pkpmcr1.rar和pkpmcr2.rar，下载后，分别解压，先运行pkpmcr1.rar中的setup.bat文件，如果提示：“一个文件正在使用，已复制0个文件。”并运行PKPM后发现未能破解，请将pkpmcr2.rar包中WinSCard.DLL文件复制到PKPM各模块所在文件夹中，即可完成破解，本站试用过结构、建筑、钢结构三个模块，均可用，如需应用到工程实际中，请与正版对比后，斟酌使用，谢谢。本站对其未对比就使用此破解版导致的不良后果，不负责任，切记。本贴已关闭，有事请在本版开新贴说明。 这是PKPM2005.12.17版综合破解方案的第二包，文件名是pkpmcr2.rar，应用请遵循第一贴的说明,这二个包是有区别的，虽然文件名和大小及其属性相同，但还是有区别的，请看两个包中的说明文件，如果包1未能成功破解，请用包2，谢谢. 这里FTP里有以下软件可以下载用户名xudown密码down ftp://219.153.14.92/APM2005.exe ftp://219.153.14.92/PKPM2005.12.17.rar ftp://219.153.14.92/比较工具.exe ftp://219.153.14.92/桥梁通安装狗.exe ftp://219.153.14.92/正版锁计算模型的结果.rar
上传时间： 2013-10-23
上传用户：gxy670166755
This Unix C code monitors a web server every few minutes by trying to retrieve its home page. It sends you email when it can t connect, and every so often while the server is still down. It sends a final message when it comes back up. If you have email paging, just direct the email to your pager address.
标签： monitors retrieve minutes server
上传时间： 2015-01-11
上传用户：pompey
一个有undo，redo，cut等功能的JTextArea
标签： undo
上传时间： 2014-01-09
上传用户：Altman
一个简单的java教程，， 本人down的。无密码
上传时间： 2013-12-19
上传用户：ljt101007
这是一个用C语言编写的在turboc环境下运行的小程序，有兴趣的朋友可能DOWN下来
上传时间： 2015-03-18
上传用户：牛布牛
