英文描述： Synchronous Up/Down Decade Counters(single clock line) 中文描述： 同步向上/向下十年计数器（单时钟线）
上传时间： 2013-06-18
上传用户：haohaoxuexi
This unique guide to designing digital VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of digital design, using the physics that designers need to know, and no more.Covering system and component aspects, design verification, VHDL modelling, clocking, signalintegrity, layout, electricaloverstress, field-programmable logic, economic issues, and more, thescope of the book is singularly comprehensive.
标签： Integrated Digital Circuit Design
上传时间： 2013-11-04
上传用户：life840315
The STM32F10xxx microcontroller family embeds up to three advanced 12-bit ADCs (depending on the device) with a conversion time down to 1 μs. A self-calibration feature is provided to enhance ADC accuracy versus environmental condition changes.
上传时间： 2014-12-23
上传用户：eastimage
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2013-10-15
上传用户：busterman
LED Dimmingcontrol
标签： Step-Down Dimming Driver Using
上传时间： 2014-01-26
上传用户：watch100
1.2MHz 2A Synchronous Step-Down converter
上传时间： 2013-11-01
上传用户：qingzhuhu
Abstract: Some types of loads require more current during startup than when running. Other loads can be limited to a lower-powercurrent during startup but require a higher operating current. This article describes an application circuit that automatically adjusts apower circuit’s overcurrent protection level up or down after startup is complete.
上传时间： 2013-10-23
上传用户：swaylong
The core voltages for FPGAs are moving lower as a resultof advances in the fabrication process. The newest FPGAfamily from Altera, the Stratix® II, now requires a corevoltage of 1.2V and the Stratix, Stratix GX, HardCopy®Stratix and CycloneTM families require a core voltage of1.5V. This article discusses how to power the core and I/Oof low voltage FPGAs using the latest step-down switchmode controllers from Linear Technology Corporation.
上传时间： 2013-10-08
上传用户：wangfei22
The LTC®3414 offers a compact and efficient voltage regulatorsolution for point of load conversion in electronicsystems that require low output voltages (down to 0.8V)from a 2.5V to 5V power bus. Internal power MOSFETswitches, with only 67mW on-resistance, allow theLTC3414 to deliver up to 4A of output current with efficiencyas high as 94%. The LTC3414 saves space by operatingwith switching frequencies as high as 4MHz, enabling theuse of tiny inductors and capacitors.
上传时间： 2014-01-03
上传用户：dongbaobao
高的工作电压高达100V N双N沟道MOSFET同步驱动 The D810DCDC is a synchronous step-down switching regulator controller that can directly step-down voltages from up to 100V, making it ideal for telecom and automotive applications. The D810DCDC uses a constant on-time valley current control architecture to deliver very low duty cycles with accurate cycle-by-cycle current limit, without requiring a sense resistor. A precise internal reference provides 0.5% DC accuracy. A high bandwidth (25MHz) error amplifi er provides very fast line and load transient response. Large 1Ω gate drivers allow the D810DCDC to drive multiple MOSFETs for higher current applications. The operating frequency is selected by an external resistor and is compensated for variations in VIN and can also be synchronized to an external clock for switching-noise sensitive applications. Integrated bias control generates gate drive power from the input supply during start-up and when an output shortcircuit occurs, with the addition of a small external SOT23 MOSFET. When in regulation, power is derived from the output for higher effi ciency.
上传时间： 2013-10-24
上传用户：wd450412225
