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  • CAT28LV64-64Kb CMOS并行EEPROM数据手

    The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.

    标签: EEPROM 64 CMOS CAT

    上传时间: 2013-11-16

    上传用户:浩子GG

  • C51中的关键字及用途说明

    C51 中的关键字关键字 用途 说明auto 存储种类说明 用以说明局部变量,缺省值为此break 程序语句 退出最内层循环case 程序语句 Switch 语句中的选择项char 数据类型说明 单字节整型数或字符型数据const 存储类型说明 在程序执行过程中不可更改的常量值continue 程序语句 转向下一次循环default 程序语句 Switch 语句中的失败选择项do 程序语句 构成do..while 循环结构double 数据类型说明 双精度浮点数else 程序语句 构成if..else 选择结构enum 数据类型说明 枚举extern 存储种类说明 在其他程序模块中说明了的全局变量flost 数据类型说明 单精度浮点数for 程序语句 构成for 循环结构goto 程序语句 构成goto 转移结构if 程序语句 构成if..else 选择结构int 数据类型说明 基本整型数long 数据类型说明 长整型数register 存储种类说明 使用CPU 内部寄存的变量return 程序语句 函数返回short 数据类型说明 短整型数signed 数据类型说明 有符号数,二进制数据的最高位为符号位sizeof 运算符 计算表达式或数据类型的字节数static 存储种类说明 静态变量struct 数据类型说明 结构类型数据swicth 程序语句 构成switch 选择结构typedef 数据类型说明 重新进行数据类型定义union 数据类型说明 联合类型数据unsigned 数据类型说明 无符号数数据void 数据类型说明 无类型数据volatile 数据类型说明 该变量在程序执行中可被隐含地改变while 程序语句 构成while 和do..while 循环结构ANSIC 标准关键字关键字 用途 说明bit 位标量声明 声明一个位标量或位类型的函数sbit 位标量声明 声明一个可位寻址变量

    标签: C51

    上传时间: 2013-10-08

    上传用户:waves_0801

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    标签: Signal Input Fall Rise

    上传时间: 2013-10-23

    上传用户:copu

  • I2C slave routines for the 87L

    The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we show anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. Switching between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.

    标签: routines slave I2C 87L

    上传时间: 2013-11-19

    上传用户:shirleyYim

  • 便携式超声系统中的Xilinx器件

    There has long been a need for portable ultrasoundsystems that have good resolution at affordable costpoints. Portable systems enable healthcare providersto use ultrasound in remote locations such asdisaster zones, developing regions, and battlefields,where it was not previously practical to do so.

    标签: Xilinx 便携式 超声系统 器件

    上传时间: 2013-10-26

    上传用户:liulinshan2010

  • WP401-FPGA设计的DO-254

    The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.

    标签: FPGA 401 254 WP

    上传时间: 2013-11-12

    上传用户:q123321

  • CPLD和FPGA设计介绍

    Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.

    标签: CPLD FPGA

    上传时间: 2013-10-29

    上传用户:lixqiang

  • 101-200晶体管电路集

    This is the second half of our Transistor Circuits e-book. It contains a further 100 circuits, with many of them containing one or more Integrated Circuits (ICs).It's amazing what you can do with transistors but when Integrated Circuits came along, the whole field of electronics exploded.

    标签: 101 200 晶体管 电路

    上传时间: 2013-11-08

    上传用户:603100257

  • Auto CAD全套建筑图纸设计教程

    Auto CAD全套建筑图纸设计教程  AutoCAD软件的背景及运用;了解相对以往版本的改进:掌握AutoCAD2006文件的开启及存储。

    标签: Auto CAD 建筑图纸设计 教程

    上传时间: 2013-11-18

    上传用户:love_stanford

  • 便携式超声系统中的Xilinx器件

    There has long been a need for portable ultrasoundsystems that have good resolution at affordable costpoints. Portable systems enable healthcare providersto use ultrasound in remote locations such asdisaster zones, developing regions, and battlefields,where it was not previously practical to do so.

    标签: Xilinx 便携式 超声系统 器件

    上传时间: 2015-01-01

    上传用户:hfnishi