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Analog-Digital-converter

  • pk51下载 (8051单片机开发工具)

    PK51是为8051系列单片机所设计的开发工具,支持所有8051系列衍生产品,,支持带扩展存储器和扩展指令集(例如Dallas390/5240/400,Philips 51MX,Analog Devices MicroConverters)的新设备,以及支持很多公司的一流的设备和IP内核,比如Analog Devices, Atmel, Cypress Semiconductor, Dallas Semiconductor, Goal, Hynix, Infineon, Intel, NXP(founded by Philips), OKI, Silicon Labs,SMSC, STMicroeleectronics,Synopsis, TDK, Temic, Texas Instruments,Winbond等。通过PK51专业级开发工具,可以轻松地了解8051的On-chip peripherals与及其它关键特性。    

    标签: 8051 pk 51

    上传时间: 2013-10-09

    上传用户:1109003457

  • pic单片机资料

    pic单片机资料 请注意以下有关Microchip 器件代码保护功能的要点:• Microchip的产品均达到Microchip 数据手册中所述的技术指标。• Microchip确信:在正常使用的情况下, Microchip 系列产品是当今市场上同类产品中最安全的产品之一。• 目前,仍存在着恶意、甚至是非法破坏代码保护功能的行为。就我们所知,所有这些行为都不是以Microchip 数据手册中规定的操作规范来使用Microchip 产品的。这样做的人极可能侵犯了知识产权。• Microchip愿与那些注重代码完整性的客户合作。• Microchip或任何其它半导体厂商均无法保证其代码的安全性。代码保护并不意味着我们保证产品是“牢不可破”的。代码保护功能处于持续发展中。Microchip 承诺将不断改进产品的代码保护功能。任何试图破坏Microchip 代码保护功能的行为均可视为违反了《数字器件千年版权法案(Digital Millennium Copyright Act)》。如果这种行为导致他人在未经授权的情况下,能访问您的软件或其它受版权保护的成果,您有权依据该法案提起诉讼,从而制止这种行为。

    标签: pic 单片机资料

    上传时间: 2013-10-19

    上传用户:nunnzhy

  • dsPIC30F数字信号控制器入门用户指南

    dsp开发工具 请注意以下有关Microchip 器件代码保护功能的要点: • Microchip 的产品均达到Microchip 数据手册中所述的技术指标。 • Microchip 确信:在正常使用的情况下, Microchip 系列产品是当今市场上同类产品中最安全的产品之一。 • 目前,仍存在着恶意、甚至是非法破坏代码保护功能的行为。就我们所知,所有这些行为都不是以Microchip 数据手册中规定的 操作规范来使用Microchip 产品的。这样做的人极可能侵犯了知识产权。 • Microchip 愿与那些注重代码完整性的客户合作。 • Microchip 或任何其他半导体厂商均无法保证其代码的安全性。代码保护并不意味着我们保证产品是“牢不可破”的。 代码保护功能处于持续发展中。Microchip 承诺将不断改进产品的代码保护功能。任何试图破坏Microchip 代码保护功能的行为均可视 为违反了《数字器件千年版权法案(Digital Millennium Copyright Act)》。如果这种行为导致他人在未经授权的情况下,能访问您的 软件或其他受版权保护的成果,您有权依据该法案提起诉讼,从而制止这种行为。

    标签: dsPIC 30F 30 数字信号

    上传时间: 2014-12-28

    上传用户:123312

  • 基于DSP Builder数字信号处理器的FPGA设计

    针对使用硬件描述语言进行设计存在的问题,提出一种基于FPGA并采用DSP Builder作为设计工具的数字信号处理器设计方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ设计流程,设计了一个12阶FIR 低通数字滤波器,通过Quartus 时序仿真及嵌入式逻辑分析仪SignalTapⅡ硬件测试对设计进行了验证。结果表明,所设计的FIR 滤波器功能正确,性能良好。 Abstract:  Aiming at the problems in designing DSP using HDL,a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.

    标签: Builder FPGA DSP 数字信号处理器

    上传时间: 2013-11-17

    上传用户:lo25643

  • 基于DSP的新型柴油发电机励磁控制系统研究

    在综合分析谐波励磁无刷同步发电机励磁控制系统的基础上,对其励磁控制策略进行了研究,开发了一套基于DSP( TMS320F2812) 控制的新型柴油发电机励磁控制系统,该系统采用参数自适应模糊PID 控制励磁,选用交流采样方式实时检测各信号的瞬时特性,系统仿真结果以及在1 台25 kW 工频柴油发电机上的试验结果证明了该控制器具有较好的电压调节特性,系统稳态和暂态性能完全满足发电机对励磁系统的要求。关键词:励磁调节;模糊PID 控制;数字信号处理器;交流采样 Abstract :According to the general analysis of the excitation cont rol system of the harmonious wave excitation brushless synchronous generator and it s characteristics ,a new type of diesel generator excitation cont rol system based on DSP( TMS320F2812) was designed. An adaptive fuzzy PID cont rol of excitation is used in this system. To detect the t ransient characteristics of the signals in a timely manner ,AC sampling was applied.The system simulation result s and the testing result s f rom a 25 kW diesel generator (50 Hz) can prove that the voltage regulation characteristics of the excitation cont rol system are very well ,and both the steadyOstate performance and the t ransient performance of the generator are also good.Key words :excitation cont rol ;fuzzy PID cont rol ;digital signal processor (DSP) ;AC sampling

    标签: DSP 柴油发电机 励磁控制 系统研究

    上传时间: 2013-10-29

    上传用户:fxf126@126.com

  • 扩频通信芯片STEL-2000A的FPGA实现

    针对传统集成电路(ASIC)功能固定、升级困难等缺点,利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块,在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波,给出了DQPSK解调的原理和实现方法,推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言编写出源程序,在Virtex-II Pro 开发板上成功实现了整个系统。测试结果表明该系统正确实现了STEL-2000A的核心功能。 Abstract:  To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.

    标签: STEL 2000 FPGA 扩频通信

    上传时间: 2013-11-06

    上传用户:liu123

  • 基于CPLD的QDPSK调制解调电路设计

    为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中,测试结果表明,调制电路能正确选相,解调电路输出数据与QDPSK调制输入数据完全一致,达到了预期的设计要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    标签: QDPSK CPLD 调制解调 电路设计

    上传时间: 2014-01-13

    上传用户:qoovoop

  • Virtex-5 GTP Transceiver Wizar

    The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts

    标签: Transceiver Virtex Wizar GTP

    上传时间: 2013-10-23

    上传用户:leyesome

  • 基于SCT3918的CDMR数字对讲机设计

    为了响应国家工业和信心产业部[2009]666号文件我国数字对讲机实现模拟转数字化的要求,并且为了方便企业生产和调试、降低成本的目的。采用国产基带芯片SCT3918设计了一款适应我国国情的数字对讲机CDMR(China Digital Mobile Radio),在实验室内做了射频技术指标测试、音频技术指标测试、可靠性测试,实验结果表明射频技术指标符合[2009]666号文件要求,音频技术指标符合《移动通信调频无线电话机通用技术条件》,设计符合我国对讲机模拟转数字的政策、适合我国的国情、便于企业生产和调试。

    标签: 3918 CDMR SCT 数字对讲机

    上传时间: 2013-10-18

    上传用户:caozhizhi

  • ISM射频接收器的基带计算

    Abstract: Many industrial/scientific/medical (ISM) band radio frequency (RF) receivers use an external Sallen-Key datafilter and a data slicer to generate the baseband digital output. This tutorial describes the ISM-RF Baseband Calculator,which can be used to calculate the filter capacitor values and the data slicer RC components, while providing a visualexample of the baseband signals.

    标签: ISM 射频接收器 基带计算

    上传时间: 2013-11-04

    上传用户:jkhjkh1982