ACtive-HDL

verilog hdl coding DDR sdram control for fpga

verilog hdl coding DDR sdram control for fpga

标签： verilog control coding sdram

上传时间： 2013-12-17

上传用户：wangchong
利用verlilog hdl语言编程

利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！

标签： verlilog hdl 语言编程

上传时间： 2015-12-10

上传用户：erkuizhang
The Microsoft® Active Directory™ Service Interfaces (ADSI) Software Development Kit (SDK) is

The Microsoft® Active Directory™ Service Interfaces (ADSI) Software Development Kit (SDK) is a client-side product, based on the Component Object Model (COM), that defines a directory service model and a set of COM interfaces that enables Microsoft Windows NT® /Windows® 2000 and Windows 95 client applications to access several network directory services.

标签： Development Interfaces Microsoft Directory

上传时间： 2013-12-25

上传用户：daguda
该代码中有不少关于学习verilog HDL的例子,对初学者有帮助

该代码中有不少关于学习verilog HDL的例子,对初学者有帮助

标签： verilog HDL 代码初学者

上传时间： 2013-12-19

上传用户：asdkin
图像处理的关于Snakes : Active Contour Models算法和水平集以及GVF的几篇文章

图像处理的关于Snakes : Active Contour Models算法和水平集以及GVF的几篇文章，文章列表为： [1]Snakes Active Contour Models.pdf [2]Multiscale Active Contours.pdf [3]Snakes, shapes, and gradient vector flow.pdf [4]Motion of level sets by mean curvature I.pdf [5]Spectral Stability of Local Deformations Spectral Stability of Local Deformations.pdf [6]An active contour model for object tracking using the previous contour.pdf [7]Volumetric Segmentation of Brain Images Using Parallel Genetic AlgorithmsI.pdf [8]Segmentation in echocardiographic sequences using shape-based snake model.pdf [9]Active Contours Without Edges.pdf 学习图像处理的人必看的几篇文章

标签： Contour Snakes Active Models

上传时间： 2014-01-15

上传用户：wqxstar
Verilog HDL课件

Verilog HDL课件，有常见问题说明

标签： Verilog HDL

上传时间： 2013-12-21

上传用户：sdq_123
Verilog HDL的标准

Verilog HDL的标准，比较详细的语法说明

标签： Verilog HDL 标准

上传时间： 2015-12-15

上传用户：xsnjzljj
As the Hardware Description Language (HDL) enhancement activities have increased over the past year,

As the Hardware Description Language (HDL) enhancement activities have increased over the past year, so too has the complexity in determining which language(s) are the best tools for designers and organizations to continue using or to adopt. Many designers and organizations are contemplating whether they should switch from one HDL to another.

标签： Description enhancement activities the

上传时间： 2015-12-15

上传用户：sunjet
Testbenches have become an integral part of the design process, enabling you to verify that your HDL

Testbenches have become an integral part of the design process, enabling you to verify that your HDL model is sufficiently tested before implementing your design and helping you automate the design verification process. It is essential, therefore, that you have confidence your testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation helps to ensure the quality and thoroughness of your tests.

标签： Testbenches enabling integral process

上传时间： 2014-01-25

上传用户：ynzfm
As the Hardware Description Language (HDL) enhancement activities have increased over the past year,

As the Hardware Description Language (HDL) enhancement activities have increased over the past year, so too has the complexity in determining which language(s) are the best tools for designers and organizations to continue using or to adopt. Many designers and organizations are contemplating whether they should switch from one HDL to another.

标签： Description enhancement activities the

上传时间： 2015-12-15

上传用户：SimonQQ