目前,大型设计一般推荐使用同步时序电路。同步时序电路基于时钟触发沿设计,对时钟的周期、占空比、延时和抖动提出了更高的要求。为了满足同步时序设计的要求,一般在FPGA设计中采用全局时钟资源驱动设计的主时钟,以达到最低的时钟抖动和延迟。 FPGA全局时钟资源一般使用全铜层工艺实现,并设计了专用时钟缓冲与驱动结构,从而使全局时钟到达芯片内部的所有可配置单元(CLB)、I/O单元 (IOB)和选择性块RAM(Block Select RAM)的时延和抖动都为最小。为了适应复杂设计的需要,xilinx的FPGA中集成的专用时钟资源与数字延迟锁相环(DLL)的数目不断增加,最新的 Virtex II器件最多可以提供16个全局时钟输入端口和8个数字时钟管理模块(DCM)。与全局时钟资源相关的原语常用的与全局时钟资源相关的xilinx器件原语包括:IBUFG、IBUFGDS、BUFG、BUFGP、BUFGCE、 BUFGMUX、BUFGDLL和DCM等,如图1所示。
上传时间: 2013-11-20
上传用户:563686540
ZBT SRAM控制器参考设计,xilinx提供VHDL代码 Description: Contains the following files readme.txt appnote_zbtp.vhd appnote_zbtf.vhd appnote_zbt.ucf Platform: All Installation/Use: Use 'unzip' on the .zip file and 'gunzip' followed by 'tar -xvf' on the .tar.gz file.
上传时间: 2013-10-25
上传用户:peterli123456
USB接口控制器参考设计,xilinx提供VHDL代码 usb xilinx vhdl ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 2 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
上传时间: 2013-10-29
上传用户:zhouchang199
UART 4 UART参考设计,xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they do not instantiate the DUT. This can easily be done in a top-level VHDL file or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench for txmit.vhd. rcvr_tf.vhd -- Test bench for rcvr.vhd.
上传时间: 2013-11-02
上传用户:18862121743
用xilinx CPLD作为电机控制器
上传时间: 2013-10-16
上传用户:macarco
The revolution of automation on factory floors is a key driver for the seemingly insatiable demand for higher productivity, lower total cost of ownership,and high safety. As a result, industrial applications drive an insatiable demand of higher data bandwidth and higher system-level performance. This white paper describes the trends and challenges seen by designers and how FPGAs enable solutions to meet their stringent design goals.
上传时间: 2013-11-08
上传用户:yan2267246
xilinx设计可以快速适应各种发展标准和处理要求,从而可以改进分析能力来满足市场需求,同时可以在最初部署后的很长一段时间内添加各种特性和功能。 xilinx All Programmable FPGA 和基于 SoC 的解决方案和平台可充分满足当今磁场定向控制 (FOC) 等复杂控制算法所提出的苛刻的时序和性能要求。 xilinx 工业成像解决方案实现了快速原型开发,简化了开发工作,极大地缩短了高分辨率视频会议、视频监控和机器视觉系统的面市时间。
上传时间: 2013-11-17
上传用户:jhs541019
xilinx Sdram控制器VHDL源代码
上传时间: 2014-01-14
上传用户:gdgzhym
51的VERILOG代码!适用于xilinx的FPGA
上传时间: 2015-02-04
上传用户:lijianyu172
xilinx virtex architecture
标签: architecture xilinx virtex
上传时间: 2015-02-06
上传用户:6546544