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ultra-Wideband

  • Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

      中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    标签: UltraScale Xilinx 架构

    上传时间: 2013-11-13

    上传用户:瓦力瓦力hong

  • 基于码本映射的语音带宽扩展算法研究

    在现代通信系统中,电话语音的频带被限制在300 Hz~4 kHz的范围内,带来了语音可懂度和自然度的降低。为了在不增加额外成本的前提下提高语音的可懂度和自然度,进行了电话语音频带扩展的研究。提出了一种改进的基于码本映射的语音带宽扩展算法:在码本映射的过程中,使用加权系数来得到映射码本。客观测试结果表明,用此算法得到的宽带语音的谱失真度比用一般的码本映射降低至少2%。主观测试结果表明,用此算法得到的宽带语音具有更好的可懂度和自然度。 Abstract:  In modern communication systems, the bandwidth of telephone speech is limited from 300Hz to 4 kHz, which reduces the intelligibility and naturalness of speech. Telephone speech bandwidth extension is researched to get wideband speech and to improve its intelligibility and naturalness, without increasing extra costs. This paper put forward an improved algorithm of speech bandwidth extension based on codebook mapping. In the process of codebook mapping, weighted coefficients were used to get mapping codebook. Objective tests show that spectral distortion of wideband speech obtained by this algorithm reduces at least 2%, comparing to conditional codebook mapping. Subjective tests show that the wideband speech obtained by this algorithm has better intelligibility and naturalness.

    标签: 映射 带宽 扩展 语音

    上传时间: 2014-12-29

    上传用户:15501536189

  • Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

      中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    标签: UltraScale Xilinx 架构

    上传时间: 2013-11-21

    上传用户:wxqman

  • LT5528 WCDMA ACPR和AltCPR测量

      ACPR (adjacent channel power ratio), AltCPR (alternatechannel power ratio), and noise are important performancemetrics for digital communication systems thatuse, for example, WCDMA (wideband code division multipleaccess) modulation. ACPR and AltCPR are bothmeasures of spectral regrowth. The power in the WCDMAcarrier is measured using a 5MHz measurement bandwidth;see Figure 1. In the case of ACPR, the total powerin a 3.84MHz bandwidth centered at 5MHz (the carrierspacing) away from the center of the outermost carrier ismeasured and compared to the carrier power. The resultis expressed in dBc. For AltCPR, the procedure is thesame, except we center the measurement 10MHz awayfrom the center of the outermost carrier.

    标签: AltCPR WCDMA 5528 ACPR

    上传时间: 2013-11-02

    上传用户:maricle

  • 本系统是在asp版《在线文件管理器》的基础上设计制作

    本系统是在asp版《在线文件管理器》的基础上设计制作,取其精华,弃其糟粕,功能更强,效率更高,具有以下特点: 1。采用三层结构开发,程序逻辑和用户界面彻底分离,可轻松换肤。 2。全部代码采用Ultra Edit编写,不使用任何可视化开发工具,精确控制代码流程,确保代码高效率运行。 3。自行开发自定义控件,不产生任何一丁点的HTML代码冗余。 4。尽可能的减少客户与服务器的交互,降低对服务器资源消耗,减少网络传输。 5。真正多用户系统,可分别为每个用户设置可管理的文件类型,目录等,上传的单个文件大小限制等。 6。各用户环境自由配置,风格自选(如果有多个风格的话),可自由设置每页显示的文件及目录数等。 7。文件与目录翻页分开,即使管理同一目录下的数万个文件也不再出现程序超时现象。 8。功能强大,除了asp版具备的全部功能如上传、下载、编辑、批量复制、移动、粘贴外还具备文件快速过滤搜索,智能修改文件属性。 9。效率极高。经测试,在一太普通PC上对一个包含50000个文件的目录进行浏览管理,任意翻页,执行时间均不超过1秒。过滤或者搜索则更是低至仅0.3秒的执行时间。而windows资源管理器打开目录或者asp版翻至最后一页都需要6.5秒甚至更长时间。

    标签: asp 文件管理

    上传时间: 2015-04-01

    上传用户:kr770906

  • 本系统是在asp版《在线文件管理器》的基础上设计制作

    本系统是在asp版《在线文件管理器》的基础上设计制作,取其精华,弃其糟粕,功能更强,效率更高,具有以下特点: 1。采用三层结构开发,程序逻辑和用户界面彻底分离,可轻松换肤。 2。全部代码采用Ultra Edit编写,不使用任何可视化开发工具,精确控制代码流程,确保代码高效率运行。 3。自行开发自定义控件,不产生任何一丁点的HTML代码冗余。 4。尽可能的减少客户与服务器的交互,降低对服务器资源消耗,减少网络传输。 5。真正多用户系统,可分别为每个用户设置可管理的文件类型,目录等,上传的单个文件大小限制等。 6。各用户环境自由配置,风格自选(如果有多个风格的话),可自由设置每页显示的文件及目录数等。 7。文件与目录翻页分开,即使管理同一目录下的数万个文件也不再出现程序超时现象。 8。功能强大,除了asp版具备的全部功能如上传、下载、编辑、批量复制、移动、粘贴外还具备文件快速过滤搜索,智能修改文件属性。 9。效率极高。经测试,在一太普通PC上对一个包含50000个文件的目录进行浏览管理,任意翻页,执行时间均不超过1秒。过滤或者搜索则更是低至仅0.3秒的执行时间。而windows资源管理器打开目录或者asp版翻至最后一页都需要6.5秒甚至更长时间。

    标签: asp 文件管理

    上传时间: 2014-01-05

    上传用户:冇尾飞铊

  • Abstract:Noise frequency modulation(FM)jamming。which belongs to blanket jamming。is already become t

    Abstract:Noise frequency modulation(FM)jamming。which belongs to blanket jamming。is already become the main form ofnoise jamming at present。because the wideband was gained by it.Tne spectnlnl ofnoise FM jamming is analyzed by time domain autocorrelation method in this paper.It’S jamm g peculiarity and几out— putting signal’S jamming peculiarity ale explained.At last,these time series models ofnoise FM jalllIIling sig— nal and几outputting signal ale built.

    标签: jamming modulation frequency Abstract

    上传时间: 2015-10-17

    上传用户:lijinchuan

  • Real-Time Transport Protocol (RTP) Payload Format and File Storage Format for the Adaptive Multi-Ra

    Real-Time Transport Protocol (RTP) Payload Format and File Storage Format for the Adaptive Multi-Rate (AMR) and Adaptive Multi-Rate Wideband (AMR-WB) Audio Codecs

    标签: Format Real-Time Transport Protocol

    上传时间: 2014-11-26

    上传用户:小草123

  • Squaring circuits are an important building block for impulse-radio UWB non-coherent receivers. This

    Squaring circuits are an important building block for impulse-radio UWB non-coherent receivers. This work proposes a squarer, based on the quadratic law of saturated transistors. Such a circuit has already been proposed for lower frequency applications, therefore this work focuses on the extension to ultra wide bandwidth, with particular care to the consequences related to the deviation from the ideal quadratic law of 0.18μm CMOS transistors.

    标签: impulse-radio non-coherent important receivers

    上传时间: 2013-12-24

    上传用户:kikye

  • 3rd Generation Partnership Project Technical Specification Group Services and System Aspects ANS

    3rd Generation Partnership Project Technical Specification Group Services and System Aspects ANSI-C code for the Fixed-point Extended AMR - Wideband (AMR-WB+) codec (Release 7)

    标签: Specification Partnership Generation Technical

    上传时间: 2017-02-24

    上传用户:wyc199288