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translators

  • java interpreter in formal language and translators

    java interpreter in formal language and translators

    标签: interpreter translators language formal

    上传时间: 2014-07-17

    上传用户:lizhizheng88

  • Protel转powerpcb(pads)工具转orcad

    使用:复制"translators"到D:\PADS2005目录下..运行就可以了. 可以将PROTEL的PCB文件和原理图文件,转成POWERPCB的PCB和原理图。。 功能相当强大。。。。 以安装到C:\ddb2PCB为例进行说明. 总共需要的文件有7个: ddb2pcb.exe powerpcb.ini romansim.fnt sdb500.dll slibs500.dll sui500.dll ddb2pcb.chm 其中powerpcb.ini内容只要前面几行就行了: [directories] SystemDir=c:\ddb2pcb LibDir=c:\ddb2pcb\lib FileDir=c:\ddb2pcb\files SystemDir用于设置程序文件和字体文件路径,LibDir设置转换后的库文件缺省保存路径,FileDir设置转换后PCB文件缺省保存路径,可以根据个人情况在Powerpcb.INI中更改相应路径。

    标签: powerpcb Protel orcad pads

    上传时间: 2013-04-24

    上传用户:emouse

  • P2P 之 UDP穿透NAT的原理与实现(附源代码) 原创:shootingstars 参考:http://midcom-p2p.sourceforge.net/draft-ford-midcom

    P2P 之 UDP穿透NAT的原理与实现(附源代码) 原创:shootingstars 参考:http://midcom-p2p.sourceforge.net/draft-ford-midcom-p2p-01.txt baidu 论坛上经常有对P2P原理的讨论,但是讨论归讨论,很少有实质的东西产生(源代码)。呵呵,在这里我就用自己实现的一个源代码来说明UDP穿越NAT的原理。 首先先介绍一些基本概念: NAT(Network Address translators),网络地址转换:网络地址转换是在IP地址日益缺乏的情况下产生的,它的主要目的就是为了能够地址重用。NAT分为两大类,基本的NAT和NAPT(Network Address/Port Translator)。 最开始NAT是运行在路由器上的一个功能模块。 最先提出的是基本的NAT,它的产生基于如下事实:一个私有网络(域)中的节点中只有很少的节点需要与外网连接(呵呵,这是在上世纪90年代中期提出的)。那么这个子网中其实只有少数的节点需要全球唯一的IP地址,其他的节点的IP地址应该是可以重用的。 因此,基本的NAT实现的功能很简单,在子网内使用一个保留的IP子网段,这些IP对外是不可见的。子网内只有少数一些IP地址可以对应到真正全球唯一的IP地址。如果这些节点需要访问外部网络,那么基本NAT就负责将这个节点的子网内IP转化为

    标签: draft-ford-midcom shootingstars sourceforge midcom-p

    上传时间: 2015-12-08

    上传用户:kernaling

  • This book has been written to support a practically oriented course in programming language transla

    This book has been written to support a practically oriented course in programming language translation for senior undergraduates in Computer Science. More specifically, it is aimed at students who are probably quite competent in the art of imperative programming (for example, in C++, Pascal, or Modula-2), but whose mathematics may be a little weak students who require only a solid introduction to the subject, so as to provide them with insight into areas of language design and implementation, rather than a deluge of theory which they will probably never use again students who will enjoy fairly extensive case studies of translators for the sorts of languages with which they are most familiar students who need to be made aware of compiler writing tools, and to come to appreciate and know how to use them. It will hopefully also appeal to a certain class of hobbyist who wishes to know more about how translators work.

    标签: practically programming oriented language

    上传时间: 2013-12-10

    上传用户:我干你啊

  • Vivado时序约束

    Synopsys' widely-used design constraints format, known as SDC, describes the "design intent" and surrounding constraints for synthesis, clocking, timing, power, test and environmental and operating conditions. SDC has been in use and evolving for more than 20 years, making it the most popular and proven format for describing design constraints. Essentially all synthesized designs use SDC and numerous EDA companies have translators that can read and process SDC.

    标签: Vivado 时序约束

    上传时间: 2018-07-13

    上传用户:yalsim

  • vivado集成开发环境时序约束介绍

    本文主要介绍如何在Wado设计套件中进行时序约束,原文出自 xilinx中文社区。1 Timing Constraints in Vivado-UCF to xdcVivado软件相比于sE的一大转变就是约束文件,5E软件支持的是UcF(User Constraints file,而 Vivado软件转换到了XDc(Xilinx Design Constraints)。XDC主要基于SDc(Synopsys Design Constraints)标准,另外集成了Xinx的一些约束标准可以说这一转变是xinx向业界标准的靠拢。Altera从 TimeQuest开始就一直使用SDc标准,这一改变,相信对于很多工程师来说是好事,两个平台之间的转换会更加容易些。首先看一下业界标准SDc的原文介绍:Synopsys widely-used design constraints format, known as sDc, describes the design intent"and surrounding constraints for synthesis, clocking, timing, power, test and environmental and operating conditions. sDc has been in use and evolving for more than 20 years, making it the most popular and proven format for describing design constraints. Essentially all synthesized designs use SDc and numerous EDa companies have translators that can read and process sDc

    标签: vivado

    上传时间: 2022-03-26

    上传用户:

  • Allegro转pads的方法REV1

    Allegro转pads的方法REV1实现转换,需要以下要求:1.Cadanc的PCB editor在至少XL版本以上,PADS版本必须在9.3(9.31肯定可以)以上,转换步骤1准备好要转换的allegro文件***.brd,如下:1.1复制文件夹MentorGraphics\9.3.1PADSISDDHOME\translators\skil scripts的**il文件全部复制到目录CadencelSPB_DATAlpcben\文件夹下;如下所示:1.2:创建一个新文件夹例如(……myboards_<boardlD>);并复制你想转换的 allegro PCB文件(.brd)文件到该目录下。使用allegro PCBEditor软件打开brd设计文件,并在命令提示符窗口进入这些命令行:命令>”dfl_main包括引号)实际发现要用如下的命令:命令1:skill load("D:ISPB Datallpcbenlldflmain.il")其中的D:ISPB_Datallpcbenildfl_main.il这个是指dfl_main.il文件的路径。命令2:main out如下图所示:

    标签: allegro pads

    上传时间: 2022-07-23

    上传用户:20125101110