对posix timer面向对象的封装。 进程内部每一个timer都可以拥有自己的timeout回调函数。 提供周期性timer和一次性timer。 对其进行面向对象封装。
上传时间： 2013-11-28
上传用户：gxf2016
CDrea的tOOLS，指定目标端口，指定TCP SERVER端口，以及指定timeout功能
标签： DRDoS
上传时间： 2013-06-15
上传用户：t1213121
The MAX9257/MAX9258 programmable serializer/deserializer (SerDes) devices transfer both video data and control signals over the same twisted-pair cable. However, control data can only be transmitted during the vertical blank time, which is indicated by the control-channel-enabled output (CCEN) signal. The electronic control unit (ECU) firmware designer needs to know how quickly to respond to the CCEN signal before it times out and how to calculate this duration. This application note describes how to calculate the duration of the CCEN for the MAX9257/MAX9258 SerDes chipset. The calculation is based on STO timeout, clock frequency, and UART bit timing. The CCEN duration is programmable and can be closed if not in use.
上传时间： 2014-01-24
上传用户：xingisme
基于AT89C2051的红外遥控学习器源程序6 源程序 ORG 0000H AJMP MAIN ORG 0003H AJMP KEYPRESS ORG 000BH AJMP timeout ORG 001BH AJMP timeout SENDDUAN BIT P3.0 JIEDUAN BIT P3.1 INTRPO BIT P3.2 JIEXUAN BIT P3.3 SENDLIGHT BIT P3.4 JIELIGHT BIT P3.5 CS BIT P3.7 DATADUAN BIT P1.6 CLK BIT P1.7 JIANWEI EQU R5 JIANMA EQU R6 SHANGJIAN EQU 07H;R7 OPENKEY EQU 81H CLOSEKEY EQU 00H CHUT0 EQU 11H CHUT1 EQU 11H BUFBEGIN EQU 18H OPENT1 EQU 88H CLOSET1 EQU 00H OPENT0 EQU 82H CLOSET0 EQU 00H DATABEG1 EQU 0AAH DATABEG2 EQU 33H ORG 0030HMAIN: MOV IE,#80H MOV IP,#00H MOV P3,#0FFH CLR CS SETB P1.0 SETB P1.1 SETB P1.2 CLR P1.3 CLR P1.4 CLR P1.5 CLR P1.6 CLR P1.7 MOV R3,#80H MOV R0,00HCYCLE1: MOV @R0,#00H INC R0 DJNZ R3,CYCLE1 MOV PSW,#00H MOV SP,#07H MOV TMOD,#11H MOV TCON,#00H START: MOV SP,#07H SETB SENDDUAN CLR F0 SETB EXOWAITKEY: MOV C,F0 JNC WAITKEY CJNC JIANMA,#1BH,SEND LCALL LEARNP LJMP STARTSEND: LCALL SENDP LJMP START SENDP: SETB SENDDUAN CLR F0 MOV TMOD,#CHUT1
上传时间： 2013-10-15
上传用户：lyy1234
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上传时间： 2013-10-22
上传用户：taiyang250072
多远程二极管温度传感器-Design Considerations for pc thermal management Multiple RDTS (remote diode temperature sensing) provides the most accurate method of sensing an IC’s junction temperature. It overcomes thermal gradient and placement issues encountered when trying to place external sensors. PCB component count decreases when using a device that provides multiple inputs.Better temperature sensing improves product performance and reliability. Disk drive data integrity suffers at elevated temperatures. IBM published an article stating that a 5°C rise in operating temperature causes a 15% increase in the drive’s failure rate. The overall performance of a system can be improved by providing a more accurate temperature measurement of the most critical devices allowing them to run just a few degrees hotter.The LM83 directly senses its own temperature and the temperature of three external PN junctions. One is dedicated to the CPU of choice, the other two go to other parts of your system that need thermal monitoring such as the disk drive or graphics chip. The SMBus-compatible LM83 supports SMBus timeout and logic levels. The LM83 has two interrupt outputs; one for user-programmable limits and WATCHDOG capability (INT), the other is a Critical Temperature Alarm output (T_CRIT_A) for system power supply shutdown.
标签： Considerat Design 远程 二极管
上传时间： 2014-12-21
上传用户：ljd123456
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上传时间： 2013-10-24
上传用户：s蓝莓汁
This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).
上传时间： 2013-11-11
上传用户：gundamwzc
一個很好用的 lcd 時鐘程序 C語言 #include<reg51.h> #include<stdio.h> //定義計時器0 的重裝值 #define RELOAD_HIGH 0x3C #define RELOAD_LOW 0xD2 //定義按鍵彈跳時間 #define DB_VAL //定義設置模式的最大時間間隔 #define timeout 200 //定義游標位置常數 #define HOME 0 #define HOUR 1 #define MIN 2 #define SEC 3
标签： include define RELOAD stdio
上传时间： 2014-12-19
上传用户：zukfu
2.0.12 (May 13th, 2004) - Flag driver threads with PF_FREEZE to support software suspend. 2.0.11 (May 7th, 2004) - Avoid split-completion bugs in certain PCI-X chipsets by breaking up large completion entry DMAs on ADB boundaries. 2.0.10 (April 9th, 2004) - Return "command timeout" status instead of "selection timeout status" to the SCSI mid-layer in response to selection timeouts. While the latter may seem more correct, the mid-layer will not offline devices suffering from persistent selection timeouts. This leads to extremely long recovery times for devices that go missing. Returning command timeout status causes the mid-layer to enter recovery and eventually offline persistently missing devices.
标签： PF_FREEZE software support suspend
上传时间： 2016-01-05
上传用户：亚亚娟娟123
