In C Algorithms for Real-Time DSP, author Paul M. Embree presents a complete guide to digital signal processing techniques in the C programming language. This book is structured in such a way that it will be most useful to the engineer who is familiar with DSP and the C language, but who is not necessarily an expert in both. All of the example programs in this book have been tested using standard C compilers in the UNIX and MS-DOS programming environments. In addition, the examples have been compiled using the real-time programing tools of specific real-time embedded DSP microprocessors (Analog Devices ADSP-21020 and ADSP-21062 texas Instruments TMS320C30 and TMS320C40 and AT&T DSP32C) and then tested with real-time hardware using real-world signals.
标签： M. Algorithms Real-Time complete
上传时间： 2014-01-07
上传用户：epson850
Commercially available active noise control headphones rely on fixed analog controllers to drive "anti-noise" loudspeakers. Our design uses an adaptive controller to optimally cancel unwanted acoustic noise. This headphone would be particularly useful for workers who operate or work near heavy machinery and engines because the noise is selectively eliminated. Desired sounds, such as speech and warning signals, are left to be heard clearly. The adaptive control algorithm is implemented on a texas Instruments (TI™ ) 1 TMS320C30GEL digital signal processor (DSP), which drives a Sony CD550 headphone/microphone system. Our experiments indicate that adaptive noise control results in a dramatic improvement in performance over fixed noise control. This improvement is due to the availability of high-performance programmable DSPs and the self-optimizing and tracking capabilities of the adaptive controller in response to the surrounding noise.
标签： Commercially controllers headphones available
上传时间： 2013-12-04
上传用户：dyctj
DESCRIPTION The texas Instruments MSP430 family of ultra-low-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 μs. The MSP430G2x13 and MSP430G2x53 series are ultra-low-power mixed signal microcontrollers with built-in 16- bit timers, up to 24 I/O capacitive-touch enabled pins, a versatile analog comparator, and built-in communication capability using the universal serial communication interface. In addition the MSP430G2x53 family members have a 10-bit analog-to-digital (A/D) converter. For configuration details see Table 1. Typical applications include low-cost sensor systems that capture analog signals, convert them to digital values, and then process the data for display or for transmission to a host system.
上传时间： 2018-12-25
上传用户：ygyh
ccs6.1.2软件的安装使用方法，以及在simlulink库中c2000处理器支持的embedded coder support package for texas instrument c2000 processors
上传时间： 2019-07-20
上传用户：叶落风行
texas instruments MIPI DSI to eDP converter. Input supports 2 channel, 4 lanes each, up to 1.5GBit/s. Total input bandwidth is 12Gbit/s. Output eDP 1.4 1,2 or 4 lanes up to 5.4Gbit/s. output up to 4096x2304 60fps.
上传时间： 2021-12-22
上传用户：
ADS1256 是TI（texas I nstruments ）公司推出的一款低噪声高分辨率的24 位Si gma - Delta（"- #）模数转换器（ADC）。"- #ADC 与传统的逐次逼近型和积分型ADC 相比有转换误差小而价格低廉的优点，但由于受带宽和有效采样率的限制，"- #ADC 不适用于高频数据采集的场合。该款ADS1256 可适合于采集最高频率只有几千赫兹的模拟数据的系统中，数据输出速率最高可为30K 采样点／秒（SPS），有完善的自校正和系统校正系统， SPI 串行数据传输接口。本文结合笔者自己的应用经验，对该ADC 的基本原理以及应用做简要介绍。ADs1256 的总体电气特性下面介绍在使用ADs1256 的过程中要注意的一些电气方面的具体参数：模拟电源（AVDD ）输入范围+ 4 . 75V !+ 5 .25V，使用的典型值为+ 5 .00V；数字电源（DVDD ）输入范围+ 1 . 8V !+ 3 .6V，使用的典型值+ 3 .3V；参考电压值（VREF= VREFP- VREFN）的范围+ 0 .5V!+ 2 .6V，使用的典型值为+ 2 .5V；耗散功率最大为57mW；每个模拟输入端（AI N0 !7 和AI NC M）相对于模拟地（AGND）的绝对电压值范围在输入缓冲器（BUFFER）关闭的时候为AGND-0 .1 !AVDD+ 0 . 1 ，在输入缓冲器打开的时候为AGND !AVDD-2 .0 ；满刻度差分模拟输入电压值（VI N = AI NP -AI NN）为+ ／-（2VREF／PGA）；数字输入逻辑高电平范围0 .8DVDD!5 .25V（除D0 !D3 的输入点平不可超过DVDD 外），逻辑低点平范围DGND!0 .2DVDD；数字输出逻辑高电平下限为0 .8DVDD，逻辑低电平上限为0 .2DVDD，输出电流典型值为5mA；主时钟频率由外部晶体振荡器提供给XTAL1和XTAL2 时，要求范围为2 M!10 MHz ，仅由CLKI N 输入提供时，范围为0 .1 M!10 MHz 。
上传时间： 2022-06-10
上传用户：
IEEE1149.1的产生1985年由IBM、AT&T、texas Instruments、Philips Electronics NV、Siemens、Alcatel和Ericsson等公司成立的JETAG（Joint European Test Action Group）提出了边界扫描技术。1986年由于其它地区的一些公司的加入，JETAG改名为JTAG。1988年JTAG提出了标准的边界扫描体系结构，名称叫Boundary-Scan Architecture Standard Proposal，Version2.0，1990年IEEE正式承认了JTAG标准，经过补充和修订以后命名命名为IEEE1149.1-90。同年又提出了BSDL（Boundary Scan Description Lauguage，边界扫描描述语言）。后来成为IEEE1149.1-93标准的一部分。
标签： jtag
上传时间： 2022-07-06
上传用户：canderile
