Wherever possible the overall technique used for this series will be "definition by example" withgeneric formulae included for use in other applications. To make stability analysis easy we will usemore than one tool from our toolbox with data sheet information, tricks, rules-of-thumb, SPICESimulation, and real-world testing all accelerating our design of stable operational amplifier (op amp)circuits. These tools are specifically targeted at voltage feedback op amps with unity-gain bandwidths<20 MHz, although many of the techniques are applicable to any voltage feedback op amp. 20 MHz ischosen because as we increase to higher bandwidth circuits there are other major factors in closing theloop: such as parasitic capacitances on PCBs, parasitic inductances in capacitors, parasitic inductancesand capacitances in resistors, etc. Most of the rules-of-thumb and techniques were developed not justfrom theory but from the actual building of real-world circuits with op amps <20 MHz.
标签： 运算放大器
上传时间： 2021-11-01
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1. Scope ......................................................................................................................................................................... 12. DDR4 SDRAM Package Pinout and Addressing ....................................................................................................... 22.1 DDR4 SDRAM Row for X4,X8 and X16 ................................................................................................................22.2 DDR4 SDRAM Ball Pitch........................................................................................................................................22.3 DDR4 SDRAM Columns for X4,X8 and X16 ..........................................................................................................22.4 DDR4 SDRAM X4/8 Ballout using MO-207......................................................................................................... 22.5 DDR4 SDRAM X16 Ballout using MO-207.............................................................................................................32.6 Pinout Description ..................................................................................................................................................52.7 DDR4 SDRAM Addressing.....................................................................................................................................73. Functional Description ...............................................................................................................................................83.1 Simplified State Diagram ....................................................................................................................................83.2 Basic Functionality..................................................................................................................................................93.3 RESET and Initialization Procedure .....................................................................................................................103.3.1 Power-up Initialization Sequence .............................................................................................................103.3.2 Reset Initialization with stable Power ......................................................................................................113.4 Register Definition ................................................................................................................................................123.4.1 Programming the mode registers .............................................................................................................123.5 Mode Register ......................................................................................................................................................134. DDR4 SDRAM Command Description and Operation ............................................................................................. 244.1 Command Truth Table ..........................................................................................................................................244.2 CKE Truth Table ...................................................................................................................................................254.3 Burst Length, Type and Order ..............................................................................................................................264.3.1 BL8 Burst order with CRC Enabled .........................................................................................................264.4 DLL-off Mode & DLL on/off Switching procedure ................................................................................................274.4.1 DLL on/off switching procedure ...............................................................................................................274.4.2 DLL “on” to DLL “off” Procedure ..............................................................................................................274.4.3 DLL “off” to DLL “on” Procedure ..............................................................................................................284.5 DLL-off Mode........................................................................................................................................................294.6 Input Clock Frequency Change ............................................................................................................................304.7 Write Leveling.......................................................................................................................................................314.7.1 DRAM setting for write leveling & DRAM termination function in that mode ............................................324.7.2 Procedure Description .............................................................................................................................334.7.3 Write Leveling Mode Exit .........................................................................................................................34
标签： DDR4
上传时间： 2022-01-09
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针对嵌入式产品程序更新问题,提出了一种基于IAP技术的STM32单片机在线固件升级方案,设计了STM32单片机最小系统硬件电路和USB转串口通信电路,并给出了Bootloader程序、APP程序、PC上机程序的实现流程.实验结果表明,该方案具有简单实用、稳定性高、维护成本低和设备使用效率高的特点,适用于嵌入式产品升级.For the problem of updating embedded products program,an online firmware upgrade scheme of STM32 single chip microcomputer based on IAP technology is proposed.This scheme not only elaborates the principle of IAP technology in detail but also provides the design of the minimum system hardware circuit of STM32 MCU,the design of USB for serial communication circuit,and the implementation flow of Bootloader program,APP program and PC program.The experiment results show that the scheme is simple,practical and highly stable.In addition,it can be used to actual embedded product upgrading,significantly reducing maintenance costs and improving the efficiency of equipment.
上传时间： 2022-03-25
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对某四轮独立驱动电动汽车轮毂电机进行研究,设计一种永磁无刷直流电机控制器.以STM32F103RBT6芯片为基础,对电机驱动电路、采样电路和保护电路分别进行硬件设计与分析;同时,采用模块化软件设计方案,对该控制器的软件系统进行升级.实验验证表明:所设计的电机控制器能使电机响应迅速、转速稳定、无超调,且电动车动力输出性能良好.A permanent magnet brushless direct current motor controller was designed by studying the hub motor of a four-wheel independent drive electric vehicle.Based on STM32 F103RBT6 chip,the hardware design and analysis of motor drive circuit,sampling circuit and protection circuit were carried out respectively.At the same time,modular software design scheme was adopted to upgrade the software system of the controller.Experimental results show that the designed motor controller can ensure the motor fast response,stable speed,no overshoot,and good power output performances.
上传时间： 2022-03-26
上传用户：qingfengchizhu
为设计高效率、低损耗的PFC电路,本文基于UCC28019进行电路设计。以UCC28019输出的PWM波形来控制Boost升压斩波为核心电路,使电路中的电容交替地充放电、电感交替的储存和释放能量,最后实现在输入AC20V~24V电压情况下稳定输出DC38V。测试结果表明,系统实现效率为95%左右,电压调整率小于1%,电源功率因数0.99。交流输入电压为19.0-25.8 V时,输出直流电压稳定性较好,电感无明显啸叫且纹波小,具有一定的带负载能力和实用性。In order to design the PFC circuit with high efficiency and low loss,this paper designs the circuit based on UCC28019.The PWM waveform output by UCC28019 is used to control boost chopper as the core circuit,which alternately charges and discharges capacitors,stores and releases energy by inductors,and finally achieves stable output of DC38 V under the input voltage of AC20 V~24 V.The test results show that the system achieves about 95% efficiency,the voltage adjustment rate is less than 1%,the power factor is 0.99,and the AC input voltage is 19.0-25.8 V.The output DC voltage stability is good,the inductance has no obvious whistle and the ripple is small,so it has certain load capacity and practicability.
上传时间： 2022-04-03
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基于PSIM仿真软件，分析了Boost电路拓扑结构，设定了参数要求进行电路仿真设计，通过电路仿真软件PSIM对Boost电路工作在CCM模式下，合理设置占空比参数。实验结果表明理论分析与仿真的一致性和参数设计的正确性，输出电压和电流参数稳定，Boost电路输出效率高。This design is based on PSIM simulation software,analyzes the topology of Boost circuit,sets the parameter re- quirements for circuit simulation design,and reasonably sets the duty cycle parameters for Boost circuit working in CCM mode through PSIM simulation software.The experimental results show that the theoretical analysis and simulation are consis- tent and the parameter design is correct,the output voltage and current parameters are stable.
上传时间： 2022-05-04
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