TI warrants performance of its products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
标签： specifications performance applicable the
上传时间： 2016-01-16
上传用户：weixiao99
IEEE Std 1180-1990. IEEE Standard Specifications for the Implementations of 8x8 Inverse Discrete Cosine Transform, specifies the numerical characteristics of the 8x8 inverse discrete cosine transform (IDCT) for use in visual telephony and similar applications where the 8x8 IDCT results are used in a reconstruction loop. The specifications ensure the compatibility between different implementations of the IDCT.
标签： IEEE Implementations Specifications Discrete
上传时间： 2016-01-31
上传用户：guanliya
High Definition Audio Bus Specification Rev 1.0 再来点audio的部分
标签： Specification Definition Audio audio
上传时间： 2016-01-31
上传用户：weiwolkt
High Definition Audio Bus Specification Rev 1.0, design change notes 2006.
标签： Specification Definition design change
上传时间： 2016-01-31
上传用户：894898248
High Definition Audio Bus Specification Rev 1.0, design change notes, 2007.7
标签： Specification Definition 2007.7 design
上传时间： 2016-01-31
上传用户：wangyi39
he effects of high power amplifier on the ofdam
标签： amplifier effects power ofdam
上传时间： 2013-12-25
上传用户：咔乐坞
Write a Java program that demonstrates a high priority thread using sleep to give lower priority threads a chance to run
标签： priority demonstrates program thread
上传时间： 2013-12-06
上传用户：chenxichenyue
High-Speed PCI Express Passive Switches
标签： High-Speed Switches Express Passive
上传时间： 2016-02-04
上传用户：sclyutian
High Availability Linux Documentation
标签： Documentation Availability Linux High
上传时间： 2016-02-07
上传用户：xauthu
SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief description of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge · BlockRAM Memory Controller · SDRAM Controller · Two GPIO ports · A UART Port · External SDRAM
标签： high-level following reference diagram
上传时间： 2013-12-15
上传用户：Miyuki
