Lab 2 – Synthesizable MATLAB This lab exercise will explore the effects that different MATLAB coding styles have on hardware. The lab has two parts, each of which begins with a short introduction. This lab exercise is based on the simple MATLAB FIR filter model shown below:
标签： MATLAB Synthesizable different exercise
上传时间： 2015-09-28
上传用户：sammi
This lab exercise will introduce you to AccelDSP’s floating- to fixed-point conversion features. AccelDSP will automatically generate a fixed-point representation of a floating-point design. This process is controllable by using quantize directives.
标签： fixed-point conversion introduce AccelDSP
上传时间： 2015-09-28
上传用户：zxc23456789
This lab exercise will introduce you to the AccelWare IP generators. AccelWare is a library of over fifty IP generators, available in the form of three toolkits that produce synthesizable MATLAB for common MATLAB built in and toolbox functions. Each generator offers macro and micro-architecture selections that allow full customization of the generated model to the target application requirements.
标签： AccelWare generators introduce exercise
上传时间： 2013-12-16
上传用户：2467478207
This lab exercise will cover the use of AccelDSP’s design exploration capabilities that include mapping variables to memory and unrolling loop and vector operations. You will learn how to create different hardware architectures without modifying the MATLAB source to explore different area/performance tradeoffs.
标签： capabilities exploration AccelDSP exercise
上传时间： 2014-12-22
上传用户：eclipse
hspice三天入门教程。其中包含多个lab，是新手学习的好资料。
上传时间： 2014-01-02
上传用户：一诺88
帮助文件收集了中国软件开发实验室（www.cndev-lab.com）管宁的一些c++方面的文章 希望能帮助初学者在学习的过程中节约不少时间 文章收集及CHM制作：Dludream 推荐C＋＋学习QQ群：5632640 谢谢烈火雨和管宁的支持 有问题可以到我的blog:http://dludream.blogchina.com
标签： cndev-lab Dludream www CHM
上传时间： 2015-10-23
上传用户：aysyzxzm
The purpose of this lab is to introduce the concept of FSMs with a datapath, and to study the usage of more complex test benches. Also, we enforce a rudimentary design methodology by assuming that the students are part of a bigger project, and have no knowledge of VHDL-implementation of the datapath (made by a hypothetical other group) other than its predefined Entity Interface until they come to the lab. The rest of this document is structured as follows: Section 2 describes some prelimi- nary reading and exercises that should be done before the lab. Section 3 details the design tasks that should be carried out to pass this lab.
标签： introduce datapath purpose concept
上传时间： 2014-01-24
上传用户：熊少锋
基于RT-Linux的嵌入式数控系统研究,一些总结
上传时间： 2015-12-07
上传用户：yph853211
RT-Thread是发展中的下一代微内核嵌入式实时操作系统，被设计成一个宽范围可用的系统，从资源极度紧张的小型系统，到一个带内存管理单元，网络功能的基本计算单元。 最新svn版本
上传时间： 2014-01-21
上传用户：hopy
RT-Thread是发展中的下一代微内核嵌入式实时操作系统，被设计成一个宽范围可用的系统，从资源极度紧张的小型系统，到一个带内存管理单元，网络功能的基本计算单元。 最新单内核svn版本
上传时间： 2014-01-22
上传用户：bcjtao
