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reset-ad-da-clk-power

  • 一个采用C8051F020+CH372实现的带USB功能的流量测控系统

    一个采用C8051F020+CH372实现的带USB功能的流量测控系统,包括C8051F020的AD/DA/串口编程、触摸屏的串口编程、CH372实现的USB接口编程(原创)等。这些源代码已在某产品中使用。

    标签: 8051 020 372 USB

    上传时间: 2016-11-19

    上传用户:z754970244

  • 单片机初学者可用

    单片机初学者可用,开发板为TX-C,里面有AD,DA,I2C,通讯等,供参考

    标签: 单片机 初学者

    上传时间: 2013-12-24

    上传用户:skhlm

  • 合众达DSKF2812开发板的测试程序

    合众达DSKF2812开发板的测试程序,包括AD DA CUPTIMER CAN GPIO PWM McBSP RTC SCI

    标签: DSKF 2812 合众达 开发板

    上传时间: 2013-12-12

    上传用户:huql11633

  • 51单片机入门级资料。流水灯

    51单片机入门级资料。流水灯,数码管,矩阵键盘,AD,DA,液晶,定时器中断源程序并包含有PROTEUS仿真。

    标签: 51单片机 入门级 流水灯

    上传时间: 2017-03-16

    上传用户:himbly

  • 介绍了51单片机用c语言或汇编编写的34个程序和原理图

    介绍了51单片机用c语言或汇编编写的34个程序和原理图,如 中断,定时,键盘,温度检测,密码,AD,DA,自动小车,等

    标签: 51单片机 c语言 汇编 原理图

    上传时间: 2017-03-31

    上传用户:84425894

  • DSP2407比较全的源程序 包括SPI设计

    DSP2407比较全的源程序 包括SPI设计,AD,DA,ramtest, SCI,CAN,PWM,key,EXINT,24C02,VECTOR等

    标签: 2407 DSP SPI 比较

    上传时间: 2017-08-13

    上传用户:aa54

  • 启东计算机厂实验程序

    启东计算机厂实验程序,含键盘显示、电机,AD/DA转换,IC卡读写

    标签: 计算机 实验 程序

    上传时间: 2014-12-08

    上传用户:cainaifa

  • ADDA 芯片资料

    AD/DA的使用以及芯片的介绍,给大家分享下资料

    标签: AD/DA的应用

    上传时间: 2015-04-29

    上传用户:kensmile

  • 本科单片机实验二-六汇编程序

    本科单片机实验二-六汇编程序,有八段显示、波形、AD/DA、串口

    标签: 单片机实验 汇编程序

    上传时间: 2016-07-01

    上传用户:电脑烂生无可恋

  • DDR4标准 JESD79_4

    1. Scope ......................................................................................................................................................................... 12. DDR4 SDRAM Package Pinout and Addressing ....................................................................................................... 22.1 DDR4 SDRAM Row for X4,X8 and X16 ................................................................................................................22.2 DDR4 SDRAM Ball Pitch........................................................................................................................................22.3 DDR4 SDRAM Columns for X4,X8 and X16 ..........................................................................................................22.4 DDR4 SDRAM X4/8 Ballout using MO-207......................................................................................................... 22.5 DDR4 SDRAM X16 Ballout using MO-207.............................................................................................................32.6 Pinout Description ..................................................................................................................................................52.7 DDR4 SDRAM Addressing.....................................................................................................................................73. Functional Description ...............................................................................................................................................83.1 Simplified State Diagram ....................................................................................................................................83.2 Basic Functionality..................................................................................................................................................93.3 RESET and Initialization Procedure .....................................................................................................................103.3.1 Power-up Initialization Sequence .............................................................................................................103.3.2 Reset Initialization with Stable Power ......................................................................................................113.4 Register Definition ................................................................................................................................................123.4.1 Programming the mode registers .............................................................................................................123.5 Mode Register ......................................................................................................................................................134. DDR4 SDRAM Command Description and Operation ............................................................................................. 244.1 Command Truth Table ..........................................................................................................................................244.2 CKE Truth Table ...................................................................................................................................................254.3 Burst Length, Type and Order ..............................................................................................................................264.3.1 BL8 Burst order with CRC Enabled .........................................................................................................264.4 DLL-off Mode & DLL on/off Switching procedure ................................................................................................274.4.1 DLL on/off switching procedure ...............................................................................................................274.4.2 DLL “on” to DLL “off” Procedure ..............................................................................................................274.4.3 DLL “off” to DLL “on” Procedure ..............................................................................................................284.5 DLL-off Mode........................................................................................................................................................294.6 Input Clock Frequency Change ............................................................................................................................304.7 Write Leveling.......................................................................................................................................................314.7.1 DRAM setting for write leveling & DRAM termination function in that mode ............................................324.7.2 Procedure Description .............................................................................................................................334.7.3 Write Leveling Mode Exit .........................................................................................................................34

    标签: DDR4

    上传时间: 2022-01-09

    上传用户: