关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
标签： investigates implementing pipelines circuits
上传时间： 2015-07-26
上传用户：CHINA526
Individual files are available in the following links: Bessjy -- Bessel functions Jn and Yn for real argument and integer or real order. Bessik -- Modified Bessel function In and Kn for real argument and integer or real order. CBessjy -- Bessel functions Jv and Yv for real or complex arguments and real order. CBessik -- Modified Bessel functions Iv and Kv for complex arguments and real order.
标签： Individual available following functions
上传时间： 2013-12-13
上传用户：hewenzhi
A fast customizable function for locating and measuring the peaks in noisy time-series signals. Adjustable parameters allow discrimination of "real" signal peaks from noise and background.
标签： customizable time-series measuring function
上传时间： 2015-08-10
上传用户：xhz1993
A fast customizable function for locating and measuring the peaks in noisy time-series signals. Adjustable parameters allow discrimination of "real" signal peaks from noise and background. Determines the position, height, and width of each peak by least-squares curve-fitting.
标签： customizable time-series measuring function
上传时间： 2015-08-10
上传用户：invtnewer
The Spectral Toolkit is a C++ spectral transform library written by Rodney James and Chuck Panaccione while at the National Center for Atmospheric Research between 2002 and 2005. The library contains a functional subset of FFTPACK and SPHEREPACK, including real and complex FFTs in 1-3 dimensions, and a spherical harmonic transform. Multithreading is supported through POSIX threads for the multidimensional transforms. This reference guide provides details of the public interface as well as the internal implementation of the library.
标签： Panaccion transform Spectral spectral
上传时间： 2013-12-20
上传用户：haoxiyizhong
英文版,pdf格式。 详细说明： Title: STL Tutorial and Reference Guide: C++ Programming with the Standard Template Library (2nd Edition) URL: http://www.amazon.com/exec/obidos/tg/detail/-/0201379236/ ISBN: 0201379236 Author: David R. Musser / Gillmer J. Derge / Atul Saini / Gilmer J. Derge Publisher: Addison-Wesley Page: 560 Edition: 2nd edition (March 27, 2001) Catalog: C++ Format: PDF Size: 3.8M Supplier: December Summary: The Standard Template Library was created as the first library of genetic algorithms and data structures, with four ideas in mind: generic programming, abstractness without loss of efficiency, the Von Neumann computation model, and value semantics. This guide provides a tutorial, a description of each element of the library, and sample applications. The expanded second edition includes new code examples and demonstrations of the use of STL in real-world C++ software development it reflects changes made to STL for the final ANSI/ISO C++ language standard.
标签： Programming Reference Standard Tutorial
上传时间： 2015-09-02
上传用户：Breathe0125
Bing is a point-to-point bandwidth measurement tool (hence the b ), based on ping. Bing determines the real (raw, as opposed to available or average) throughput on a link by measuring ICMP echo requests roundtrip times for different packet sizes for each end of the link
标签： Bing point-to-point measurement determines
上传时间： 2015-09-15
上传用户：lgnf
Verilog and VHDL状态机设计，英文pdf格式 State machine design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one logic block as shown in engineer. This paper will discuss a variety of issues regarding FSM design using Synopsys Design Compiler . Verilog and VHDL coding styles will be 2.0 Basic HDL coding presented. Different methodologies will be compared using real-world examples.
上传时间： 2013-12-19
上传用户：change0329
This example application is a collection of Flash Lite do s and don ts from the usability point of view. The application contains real examples and animations of static examples that help you to see problematic issues in real life on a Nokia device. The application is optimized for devices with the resolution 170 x 208 pixels used in portrait mode. This example application is closely related to the document Flash Lite: Visual Guide, and it is highly recommended to read the document before going through this example.
标签： application collection usability example
上传时间： 2015-10-05
上传用户：trepb001
With the release of PHP 5 web developers need a guide to developing with PHP 5 to both learn its complex new features and more fully implement the long-standing features on which PHP s success is built. PHP 5 in Practice is a reference guide that provides developers with easy-to-use and easily extensible code to solve common PHP problems. It focuses on providing real code solutions to problems, allowing the reader to learn by seeing exactly what is happening behind the scenes to get your solution. Because a real-life situation will rarely match the book s example problems precisely, PHP 5 in Practice explains the solution well enough that you will understand it and can learn how to truly solve your own problem.
标签： developers developing PHP release
上传时间： 2013-12-17
上传用户：xzt
