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  • 介绍C16x系列微控制器的输入信号升降时序图及特性

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.

    标签: C16x 微控制器 输入信号 时序图

    上传时间: 2014-04-02

    上传用户:han_zh

  • MATLAB与PSpice数据接口技术

    摘 要 瞬态仿真领域的许多工作需要获得可视化数据, 仿真电路不能将输出参数绘制成图形时研究工作将受到很大影响. 而权威电路仿真软件PSpice 在这个方面不尽如人意. 本文提出了一种有效的解决办法: 通过MATLAB 编程搭建一个PSpice 与MATLAB 的数据接口,使PSpice输出数据文件可以导入到MATLAB中绘制图形. 这令我们能够很方便地获得数据的规律以有效地分析仿真结果, 这项技术对于教学和工程实践都有比较实际的帮助.关键词: 瞬态仿真 仿真程序 PSpice MATLAB 可视化数据The Data Transfer from Pspice to MATLABWu hao Ning yuanzhong Liang yingAbstract Many works in the area of transient simulation has shown how a emulator such asPSpice can be interfaced to an control analysis package such as MATLAB to get viewdata. Thepaper describes how such interfaces can be made using the MATLAB programming. The platformas a typical platform will solve the problem that PSpice software sometimes can not draw the datato a picture. It can make us find the rule from numerous data very expediently, so we can analyzethe outcome of the simulation. And it also can be used in the field of education.Keywords Transient Simulation Emulator PSpice MATLAB Viewdata1 引言科学研究和工程应用常需要进行电路仿真 PSpice可进行直流 交流 瞬态等基本电路特性分析 也可进行蒙托卡诺 MC 统计分析 最坏情况 Wcase 分析 优化设计等复杂电路特性分析 它是国际上仿真电路的权威软件 而MATLAB的主要特点有 高效方便的矩阵和数组运算 编程效率高 结构化面向对象 方便的绘图功能 用户使用方便 工具箱功能强大 两者各有着重点 两种软件结合应用 对研究工作有很重要的意义香港理工大学Y. S. LEE 等人首先将PSpice和MATLAB结合 开发了电力电子电路优化用的CAD 程序MATSPICE[6] 将两者相结合的关键在于 如何用MATLAB 获取PSpice的仿真数据 对此参考文献 6 里没有详细叙述 本文着重说明用MATLAB 读取PSpice仿真数据的具体方法本论文利用MATLAB对PSpice仿真出的数据处理绘制出后者无法得到或是效果不好的仿真图形 下面就两者结合使用的例子 进行具体说明

    标签: MATLAB PSpice 数据 接口技术

    上传时间: 2013-10-20

    上传用户:wuchunzhong

  • 简化FPGA配置设计过程

    本文着重介绍了 Xilinx Platform Flash PROM 如何帮助系统和电路板设计人员简化 FPGA 配置设计。用于配置 FPGA 的可选解决方案有很多,但它们通常都需要大量的前期设计工作和时间。Platform Flash 是为配置 Xilinx FPGA 专门设计的一款包括硬件和软件支持在内的整体解决方案。  

    标签: FPGA 过程

    上传时间: 2013-11-03

    上传用户:zhangchu0807

  • 采用TÜV认证的FPGA开发功能安全系统

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 图Figure 1. Local Safety System

    标签: FPGA 安全系统

    上传时间: 2013-11-05

    上传用户:维子哥哥

  • Xilinx的Zynq可扩展式处理平台(EPP)电子教材

    Abstract: This reference design explains how to power the Xilinx Zynq Extensible Processing Platform (EPP) and peripheral ICs using

    标签: Xilinx Zynq EPP 扩展式

    上传时间: 2014-01-21

    上传用户:haohao

  • XAPP694-从配置PROM读取用户数据

    This application note describes how to retrieve user-defined data from Xilinx configurationPROMs (XC18V00 and Platform Flash devices) after the same PROM has configured theFPGA. The method to add user-defined data to the configuration PROM file is also discussed.The reference design described in this application note can be used in any of the followingXilinx FPGA architectures: Spartan™-II, Spartan-IIE, Spartan-3, Virtex™, Virtex-E, Virtex-II,and Virtex-II Pro.

    标签: XAPP PROM 694 读取

    上传时间: 2013-11-11

    上传用户:zhouli

  • WP369可扩展式处理平台-各种嵌入式系统的理想解决方案

    WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    标签: 369 WP 扩展式 处理平台

    上传时间: 2013-10-22

    上传用户:685

  • xilinx Zynq-7000 EPP产品简介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    标签: xilinx Zynq 7000 EPP

    上传时间: 2013-11-01

    上传用户:dingdingcandy

  • WP253 - 简化FPGA配置设计过程

      本文着重介绍了 Xilinx Platform Flash PROM 如何帮助系统和电路板设计人员简化 FPGA 配置设计。用于配置 FPGA 的可选解决方案有很多,但它们通常都需要大量的前期设计工作和时间。Platform Flash 是为配置 Xilinx FPGA 专门设计的一款包括硬件和软件支持在内的整体解决方案。

    标签: FPGA 253 WP 过程

    上传时间: 2013-11-04

    上传用户:ifree2016

  • 基于FPGA+DSP模式的智能相机设计

    针对嵌入式机器视觉系统向独立化、智能化发展的要求,介绍了一种嵌入式视觉系统--智能相机。基于对智能相机体系结构、组成模块和图像采集、传输和处理技术的分析,对国内外的几款智能相机进行比较。综合技术发展现状,提出基于FPGA+DSP模式的硬件平台,并提出智能相机的发展方向。分析结果表明,该系统设计可以实现脱离PC运行,完成图像获取与分析,并作出相应输出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    标签: FPGA DSP 模式 智能相机

    上传时间: 2013-10-24

    上传用户:bvdragon