The PCA9671 provides general purpose remote I/O expansion for most microcontrollerfamilies via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plus(Fm+) family.The PCA9671 is a drop in upgrade for the PCF8575 providing higher I2C-bus speeds(1 MHz versus 400 kHz) so that the output can support PWM dimming of LEDs, higherI2C-bus drive (30 mA versus 3 mA) so that many more devices can be on the bus withoutthe need for bus buffers, higher total package sink capacity (400 mA versus 100 mA) thatsupports having all 25 mA LEDs on at the same time and more device addresses (64versus 8) to allow many more devices on the bus without address conflicts.
上传时间： 2013-10-12
上传用户：laomv123
The PCA9672 provides general purpose remote I/O expansion for most microcontrollerfamilies via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plusfamily.The PCA9672 is a drop-in upgrade for the PCF8574 providing higher Fast-mode Plus(Fm+) I2C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWMdimming of LEDs, higher I2C-bus drive (30 mA versus 3 mA) so that many more devicescan be on the bus without the need for bus buffers, higher total package sink capacity(200 mA versus 100 mA) that supports having all LEDs on at the same time and moredevice addresses (16 versus 8) are available to allow many more devices on the buswithout address conflicts.
上传时间： 2013-10-23
上传用户：jasonheung
The PCA9673 provides general purpose remote I/O expansion for most microcontrollerfamilies via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plusfamily.The PCA9673 is a drop in upgrade for the PCF8575 providing higher Fast-mode Plus(Fm+) I2C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWMdimming of LEDs, higher I2C-bus drive (30 mA versus 3 mA) so that many more devicescan be on the bus without the need for bus buffers, higher total package sink capacity(400 mA versus 100 mA) that supports having all 25 mA LEDs on at the same time andmore device addresses (16 versus 8) are available to allow many more devices on the buswithout address conflicts.
上传时间： 2013-10-29
上传用户：wkchong
The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.
上传时间： 2013-10-13
上传用户：bakdesec
The PCA9674/74A is a drop-in upgrade for the PCF8574/74A providing higher Fast-modePlus I2C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWMdimming of LEDs, higher I2C-bus drive (30 mA versus 3 mA) so that many more devicescan be on the bus without the need for bus buffers, higher total package sink capacity(200 mA versus 100 mA) that supports having all LEDs on at the same time and moredevice addresses (64 versus 8) are available to allow many more devices on the buswithout address conflicts.
上传时间： 2013-10-22
上传用户：wwwwwen5
FPGA编程，仿真教程
上传时间： 2014-11-11
上传用户：lunshaomo
FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development
标签： Methodology Design Reuse FPGA
上传时间： 2013-10-23
上传用户：旗鱼旗鱼
为了在CDMA系统中更好地应用QDPSK数字调制方式，在分析四相相对移相（QDPSK)信号调制解调原理的基础上，设计了一种QDPSK调制解调电路，它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上，进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中，测试结果表明，调制电路能正确选相，解调电路输出数据与QDPSK调制输入数据完全一致，达到了预期的设计要求。 Abstract: In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
上传时间： 2014-01-13
上传用户：qoovoop
UG341 - LogiCORE™ Endpoint Block Plus v1.6 for PCI Express® 用户指南
标签： LogiCORE Endpoint Block 341
上传时间： 2013-10-11
上传用户：woshinimiaoye
为满足TD-LTE系统对实时性的要求，通过对媒体接入控制（MAC）层和物理层之间的实时性研究以及对操作系统Nucleus PLUS的机制分析，实现了MAC层子帧调度。根据TD-LTE无线综合测试仪中的设计要求，详细介绍了Nucleus PLUS任务循环调度以及MAC子帧调度的流程设计。在实现MAC层基本功能的同时满足了TD-LTE对系统实时性、子帧同步与任务资源管理的需求。
上传时间： 2013-11-10
上传用户：royzhangsz
