6小时学会labview, labview Six Hour Course – Instructor Notes This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature Monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI. The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.
标签： labview
上传时间： 2013-10-13
上传用户：zjwangyichao
PCB线宽和电流关系公式 先计算Track的截面积，大部分PCB的铜箔厚度为35um（即 1oz）它乘上线宽就是截面积，注意换算成平方毫米。 有一个电流密度经验值，为15~25安培/平方毫米。把它称上截面积就得到通流容量。 I=KT（0.44）A（0.75）， 括号里面是指数， K为修正系数，一般覆铜线在内层时取0.024，在外层时取0.048 T为最大温升，单位为摄氏度（铜的熔点是1060℃） A为覆铜截面积，单位为square mil. I为容许的最大电流，单位为安培。 一般 10mil=0.010inch=0.254mm 1A ， 250mil=6.35mm 8.3A ？倍数关系，与公式不符 ？
上传时间： 2013-11-12
上传用户：ljd123456
PCB设计问题集锦 问：PCB图中各种字符往往容易叠加在一起，或者相距很近，当板子布得很密时，情况更加严重。当我用Verify Design进行检查时，会产生错误，但这种错误可以忽略。往往这种错误很多，有几百个，将其他更重要的错误淹没了，如何使Verify Design会略掉这种错误，或者在众多的错误中快速找到重要的错误。 答：可以在颜色显示中将文字去掉,不显示后再检查;并记录错误数目。但一定要检查是否真正属于不需要的文字。 问： What’s mean of below warning:(6230,8330 L1) Latium Rule not checked: COMPONENT U26 component rule.答：这是有关制造方面的一个检查，您没有相关设定，所以可以不检查。 问： 怎样导出jop文件？答：应该是JOB文件吧？低版本的powerPCB与PADS使用JOB文件。现在只能输出ASC文件，方法如下STEP：FILE/EXPORT/选择一个asc名称/选择Select ALL/在Format下选择合适的版本/在Unit下选Current比较好/点击OK/完成然后在低版本的powerPCB与PADS产品中Import保存的ASC文件，再保存为JOB文件。 问： 怎样导入reu文件？答：在ECO与Design 工具盒中都可以进行，分别打开ECO与Design 工具盒，点击右边第2个图标就可以。 问： 为什么我在pad stacks中再设一个via:1(如附件）和默认的standardvi(如附件）在布线时V选择1，怎么布线时按add via不能添加进去这是怎么回事，因为有时要使用两种不同的过孔。答：PowerPCB中有多个VIA时需要在Design Rule下根据信号分别设置VIA的使用条件，如电源类只能用Standard VIA等等，这样操作时就比较方便。详细设置方法在PowerPCB软件通中有介绍。 问：为什么我把On-line DRC设置为prevent..移动元时就会弹出(图2),而你们教程中也是这样设置怎么不会呢?答：首先这不是错误,出现的原因是在数据中没有BOARD OUTLINE.您可以设置一个,但是不使用它作为CAM输出数据. 问：我用ctrl+c复制线时怎设置原点进行复制，ctrl+v粘帖时总是以最下面一点和最左边那一点为原点 答： 复制布线时与上面的MOVE MODE设置没有任何关系,需要在右键菜单中选择,这在PowerPCB软件通教程中有专门介绍. 问：用(图4)进行修改线时拉起时怎总是往左边拉起(图5)，不知有什么办法可以轻易想拉起左就左，右就右。答： 具体条件不明,请检查一下您的DESIGN GRID,是否太大了. 问： 好不容易拉起右边但是用(图6)修改线怎么改怎么下面都会有一条不能和在一起，而你教程里都会好好的(图8)答：这可能还是与您的GRID 设置有关,不过没有问题,您可以将不需要的那段线删除.最重要的是需要找到布线的感觉,每个软件都不相同,所以需要多练习。 问： 尊敬的老师:您好！这个图已经画好了，但我只对（如图1）一种的完全间距进行检查，怎么错误就那么多，不知怎么改进。请老师指点。这个图在附件中请老师帮看一下，如果还有什么问题请指出来，本人在改进。谢！！！！！答：请注意您的DRC SETUP窗口下的设置是错误的,现在选中的SAME NET是对相同NET进行检查,应该选择NET TO ALL.而不是SAME NET有关各项参数的含义请仔细阅读第5部教程. 问： U101元件已建好，但元件框的拐角处不知是否正确，请帮忙CHECK 答：元件框等可以通过修改编辑来完成。问： U102和U103元件没建完全，在自动建元件参数中有几个不明白：如：SOIC--》silk screen栏下spacing from pin与outdent from first pin对应U102和U103元件应写什么数值，还有这两个元件SILK怎么自动设置，以及SILK内有个圆圈怎么才能画得与该元件参数一致。 答：Spacing from pin指从PIN到SILK的Y方向的距离,outdent from first pin是第一PIN与SILK端点间的距离.请根据元件资料自己计算。
上传时间： 2014-01-03
上传用户：Divine
This program will ask how many numbers you want to find the average of, then it will allow you to enter your numbers(yes they can even be decimals) then it will calculate the mean, median, mode and range of what you enter.
上传时间： 2015-03-23
上传用户：skhlm
This a Bayesian ICA algorithm for the linear instantaneous mixing model with additive Gaussian noise [1]. The inference problem is solved by ML-II, i.e. the sources are found by integration over the source posterior and the noise covariance and mixing matrix are found by maximization of the marginal likelihood [1]. The sufficient statistics are estimated by either variational mean field theory with the linear response correction or by adaptive TAP mean field theory [2,3]. The mean field equations are solved by a belief propagation method [4] or sequential iteration. The computational complexity is N M^3, where N is the number of time samples and M the number of sources.
标签： instantaneous algorithm Bayesian Gaussian
上传时间： 2013-12-19
上传用户：jjj0202
The goal with this project was to make it possible for almost any mobile-phone to use ICQ and be able to communicate with other users! One other goal with this project was to lower the GPRS-traffic in the phone and make the ICQ-ing cheaper. A third goal was to make this service as easy to log-in to as possible. Anyone tried to fill a log-in screen with a WAP-browser should know what I mean. With Wapmess all you have to do is to write your login-url ONCE and then bookmark it in your phone, to make it available fast. :)
标签： mobile-phone possible project almost
上传时间： 2015-04-08
上传用户：xiaodu1124
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 and PORT3.1 This ARM Example may be debugged using only the uVision Simulator and your PC--no additional hardware or evaluation boards are required. The Simulator provides cycle-accurate simulation of all on-chip peripherals of the ADuC7000 device series. You may create various input signals like digital pulses, sine waves, sawtooth waves, and square waves using signal functions which you write in C. Signal functions run in the background in the simulator within timing constraints you configure. In this example, several signal functions are defined in the included Startup_SIM.INI file.
标签： the Analyzer Compiler project
上传时间： 2013-12-19
上传用户：Yukiseop
The module LSQ is for unconstrained linear least-squares fitting. It is based upon Applied Statistics algorithm AS 274 (see comments at the start of the module). A planar-rotation algorithm is used to update the QR- factorization. This makes it suitable for updating regressions as more data become available. The module contains a test for singularities which is simpler and quicker than calculating the singular-value decomposition. An important feature of the algorithm is that it does not square the condition number. The matrix X X is not formed. Hence it is suitable for ill- conditioned problems, such as fitting polynomials. By taking advantage of the MODULE facility, it has been possible to remove many of the arguments to routines. Apart from the new function VARPRD, and a back-substitution routine BKSUB2 which it calls, the routines behave as in AS 274.
标签： least-squares unconstrained Statisti Applied
上传时间： 2015-05-14
上传用户：aig85
利用多态性编程，创建一个square类，实现求三角形、正方形和圆形面积。方法 //抽象出一个共享的类，定义一个函数求面积的公共界面。再重新定义各面积的求面积 //函数，在主类中创建不同类的对象，并求不同形状的面积
标签： 编程
上传时间： 2013-12-16
上传用户：athjac
bayeserr - Computes the Bayesian risk for optimal classifier. ％ bayescln - Classifier based on Bayes decision rule for Gaussians. ％ bayesnd - Discrim. function, dichotomy, max aposteriori probability. ％ bhattach - Bhattacharya s upper limit of mean class. error. ％ pbayescln - Plots discriminat function of Bayes classifier.
标签： Classifier classifier bayeserr Computes
上传时间： 2015-06-14
上传用户：sunjet
