虫虫首页| 资源下载| 资源专辑| 精品软件
登录| 注册

lower-level

  • This book bridges the gap between higher abstract modeling concepts and the lower-level programming

    This book bridges the gap between higher abstract modeling concepts and the lower-level programming aspects of embedded systems development. You gain a solid understanding of real-time embedded systems with detailed examples and industry wisdom.

    标签: lower-level programming the abstract

    上传时间: 2014-01-14

    上传用户:yy541071797

  • The MATLAB coding style, project options and synthesis directives can have a significant effect on t

    The MATLAB coding style, project options and synthesis directives can have a significant effect on the final results. Knowledge about how a particular algorithm should be implemented in hardware can be reflected in the MATLAB code to improve the results. In doing so, the MATLAB loses a bit of its abstraction but the lower-level MATLAB will infer the desired architecture into the device.

    标签: significant directives synthesis project

    上传时间: 2013-12-03

    上传用户:13517191407

  • 电子书-RTL Design Style Guide for Verilog HDL540页

    电子书-RTL Design Style Guide for Verilog HDL540页A FF having a fixed input value is generated from the description in the upper portion of Example 2-21. In this case, ’0’ is output when the reset signal is asynchronously input, and ’1’ is output when the START signal rises. Therefore, the FF data input is fixed at the power supply, since the typical value ’1’ is output following the rise of the START signal. When FF input values are fixed, the fixed inputs become untestable and the fault detection rate drops. When implementing a scan design and converting to a scan FF, the scan may not be executed properl not be executed properly, so such descriptions , so such descriptions are not are not recommended. recommended.[1] As in the lower part of Example 2-21, be sure to construct a synchronous type of circuit and ensure that the clock signal is input to the clock pin of the FF. Other than the sample shown in Example 2-21, there are situations where for certain control signals, those that had been switched due to the conditions of an external input will no longer need to be switched, leaving only a FF. If logic exists in a lower level and a fixed value is input from an upper level, the input value of the FF may also end up being fixed as the result of optimization with logic synthesis tools. In a situation like this, while perhaps difficult to completely eliminate, the problem should be avoided as much as possible.

    标签: RTL verilog hdl

    上传时间: 2022-03-21

    上传用户:canderile

  • 如何保护集成FET的电源开关

    Abstract: Some types of loads require more current during startup than when running. Other loads can be limited to a lower-powercurrent during startup but require a higher operating current. This article describes an application circuit that automatically adjusts apower circuit’s overcurrent protection level up or down after startup is complete.

    标签: FET 保护 集成 电源开关

    上传时间: 2013-10-23

    上传用户:swaylong

  • PCA9517 Level translating I2C-

    The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.

    标签: translating Level 9517 PCA

    上传时间: 2013-12-25

    上传用户:wsf950131

  • PCA9519 4channel level transla

    The PCA9519 is a 4-channel level translating I2C-bus/SMBus repeater that enables theprocessor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBusmaximum capacitance of 400 pF on the higher voltage side. The SDA and SCL pins areover-voltage tolerant and are high-impedance when the PCA9519 is unpowered.

    标签: 4channel transla level 9519

    上传时间: 2013-11-19

    上传用户:jisiwole

  • FPGA设计重利用方法(Design Reuse Methodology)

      FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development

    标签: Methodology Design Reuse FPGA

    上传时间: 2013-10-23

    上传用户:旗鱼旗鱼

  • FPGA设计重利用方法(Design Reuse Methodology)

      FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development

    标签: Methodology Design Reuse FPGA

    上传时间: 2013-11-01

    上传用户:shawvi

  • xilinx FPGAs在工业中的应用

      The revolution of automation on factory floors is a key driver for the seemingly insatiable demand for higher productivity, lower total cost of ownership,and high safety. As a result, industrial applications drive an insatiable demand of higher data bandwidth and higher system-level performance.   This white paper describes the trends and challenges seen by designers and how FPGAs enable solutions to meet their stringent design goals.

    标签: xilinx FPGAs 工业 中的应用

    上传时间: 2013-11-08

    上传用户:yan2267246

  • libpcap is a system-independent interface for user-level packet capture. libpcap provides a portable

    libpcap is a system-independent interface for user-level packet capture. libpcap provides a portable framework for low-level network monitoring. Applications include network statistics collection, security monitoring, network debugging, etc.

    标签: libpcap system-independent user-level interface

    上传时间: 2014-08-11

    上传用户:saharawalker