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loss-Tolerant

  • 优化输电线路 精确测量电压驻波比(VSWR)

    Abstract: Impedance mismatches in a radio-frequency (RF) electrical transmission line cause power loss andreflected energy. Voltage standing wave ratio (VSWR) is a way to measure transmission line imperfections. Thistutorial defines VSWR and explains how it is calculated. Finally, an antenna VSWR monitoring system is shown.

    标签: VSWR 输电线路 精确测量 电压驻波比

    上传时间: 2013-10-19

    上传用户:yuanwenjiao

  • 一种改进的简单的电缆仿真模型

    Abstract: Nonideal cable dispersive effects can affect system performance. This application note discusses the twomain loss effects related to cables (skin-effect and dielectric losses), and presents a simple method of modeling thecable for use in standard SPICE simulators.

    标签: 电缆仿真 模型

    上传时间: 2014-11-18

    上传用户:wxnumen

  • 无需检测电阻的小型DFN封装电路断路器

      Traditionally, an Electronic Circuit Breaker (ECB) comprisesa MOSFET, a MOSFET controller and a current senseresistor. The LTC®4213 does away with the sense resistorby using the RDS(ON) of the external MOSFET. The resultis a simple, small solution that offers a signifi cant lowinsertion loss advantage at low operating load voltage.The LTC4213 features two circuit breaking responses tovarying overload conditions with three selectable tripthresholds and a high side drive for an external N-channelMOSFET switch.

    标签: DFN 检测电阻 封装 电路断路器

    上传时间: 2014-03-02

    上传用户:lixinxiang

  • 雪崩光电二极管的偏置电压和电流检测电路

      Avalanche photodiodes (APDs) are widely utilized in laserbased fiberoptic systems to convert optical data intoelectrical form. The APD is usually packaged with a signalconditioning amplifier in a small module. An APD receivermodule and attendant circuitry appears in Figure 1. TheAPD module (figure right) contains the APD and a transimpedance(e.g., current-to-voltage) amplifier. An opticalport permits interfacing fiberoptic cable to the APD’sphotosensitive portion. The module’s compact constructionfacilitates a direct, low loss connection between theAPD and the amplifier, necessary because of the extremelyhigh speed data rates involved

    标签: 雪崩 光电二极管 偏置电压 电流检测电路

    上传时间: 2013-10-25

    上传用户:brain kung

  • C8051F020

    HIGH SPEED 8051 μC CORE - Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25MHz System Clock - 22 Vectored Interrupt Sources MEMORY - 4352 Bytes Internal Data RAM (256 + 4k) - 64k Bytes In-System Programmable FLASH Program Memory - External Parallel Data Memory Interface – up to 5Mbytes/sec DIGITAL PERIPHERALS - 64 Port I/O; All are 5V tolerant - Hardware SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial Ports Available Concurrently - Programmable 16-bit Counter/Timer Array with 5 Capture/Compare Modules - 5 General Purpose 16-bit Counter/Timers - Dedicated Watch-Dog Timer; Bi-directional Reset CLOCK SOURCES - Internal Programmable Oscillator: 2-to-16MHz - External Oscillator: Crystal, RC, C, or Clock - Real-Time Clock Mode using Timer 3 or PCA SUPPLY VOLTAGE ........................ 2.7V to 3.6V - Typical Operating Current: 10mA @ 25MHz - Multiple Power Saving Sleep and Shutdown Modes 100-Pin TQFP (64-Pin Version Available) Temperature Range: –40°C to +85°C

    标签: C8051F020

    上传时间: 2013-10-12

    上传用户:lalalal

  • lpc2478完全使用手册

    NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.

    标签: 2478 lpc 使用手册

    上传时间: 2013-11-15

    上传用户:zouxinwang

  • PCA9517 Level translating I2C-

    The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.

    标签: translating Level 9517 PCA

    上传时间: 2013-12-25

    上传用户:wsf950131

  • PCA9519 4channel level transla

    The PCA9519 is a 4-channel level translating I2C-bus/SMBus repeater that enables theprocessor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBusmaximum capacitance of 400 pF on the higher voltage side. The SDA and SCL pins areover-voltage tolerant and are high-impedance when the PCA9519 is unpowered.

    标签: 4channel transla level 9519

    上传时间: 2013-11-19

    上传用户:jisiwole

  • 容迟网络中基于复制策略的单播路由算法研究

    容迟/容延网络(Delay Tolerant Network/DTN)泛指由于节点移动、能量管理、调度等原因而出现频繁中断、甚至长时间处于中断状态的一类网络。针对DTN具有的时延高、割裂频繁、节点能量受限、以及节点移动性等特点,通过对DTN中基于复制策略的单播路由策略进行分类和比较,提出了如何优化DTN单播路由算法、提高网络传输率的建议。

    标签: 容迟网络 策略 路由 算法研究

    上传时间: 2013-11-24

    上传用户:xiaojie

  • lpc2292/lpc2294 pdf datasheet

    The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.

    标签: lpc datasheet 2292 2294

    上传时间: 2014-12-30

    上传用户:aysyzxzm