Fuzzy logic system VC classes
标签： classes system Fuzzy logic
上传时间： 2015-04-15
上传用户：diets
《模糊逻辑》（Fuzzy logic）一书的例子程序，作者： Reza Langari
上传时间： 2015-04-18
上传用户：xymbian
《模糊逻辑工具箱新》（Fuzzy logic Toolbox Add-On），增加了新的公共过程基于模糊控制系统的模糊控制工具箱。 作者: Antonio Javier Barrag
标签： Toolbox Add-On Fuzzy logic
上传时间： 2015-04-18
上传用户：ANRAN
NIOS环境PWM的USER logic实例1
上传时间： 2013-12-28
上传用户：啊飒飒大师的
NIOS环境PWM的USER logic实例1
上传时间： 2015-04-26
上传用户：l254587896
NIOS环境PWM的USER logic实例3
上传时间： 2014-11-04
上传用户：cursor
NIOS环境PWM的USER logic实例4
上传时间： 2013-12-13
上传用户：franktu
NIOS环境PWM的USER logic实例5
上传时间： 2014-01-17
上传用户：稀世之宝039
This project is created using the Keil ARM CA Compiler. The logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 and PORT3.1 This ARM Example may be debugged using only the uVision Simulator and your PC--no additional hardware or evaluation boards are required. The Simulator provides cycle-accurate simulation of all on-chip peripherals of the ADuC7000 device series. You may create various input signals like digital pulses, sine waves, sawtooth waves, and square waves using signal functions which you write in C. Signal functions run in the background in the simulator within timing constraints you configure. In this example, several signal functions are defined in the included Startup_SIM.INI file.
标签： the Analyzer Compiler project
上传时间： 2013-12-19
上传用户：Yukiseop
Attributes, Constraints, and Carry logic Overview Information for Mentor Customers Schematic Syntax UCF/NCF File Syntax Attributes/logical Constraints Placement Constraints Relative Location (RLOC) Constraints Timing Constraints Physical Constraints Relationally Placed Macros (RPM) Carry logic in XC4000 FPGAs Carry logic in XC5200 FPGAs
标签： Constraints Information Attributes Customers
上传时间： 2015-05-12
上传用户：cc1015285075
