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in-System-Debugger

  • LPC900系列单片机ICP解决方案

    最近几年新出的一些MCU,有很多都具有ISP(In System Programming:在系统编程)特性,利用这一特性可以在无需通用编程器的情况下,方便地对芯片执行各种操作(擦除,读取,编程等操作);如果进一步配上一些软件(如Keil的ISD51),即可实现一些简单的在线调试功能(当然要损失一个串口)。一些开发者,也经常在自己的系统上预留ISP接口,以供日后升级之用。可以说ISP的广泛应用,标志着单片机开发技术的进步。 但是ISP功能的实现也有一定的限制,如需要一个串口,需要一定的驻留代码空间,或者需要一定外部电路。于是有一些经验不足的朋友,在实现ISP功能的时候便经常出问题,要么是外部电路的问题,要么是串口的问题。比如:为什么软件老是报“通信出错”;为什么我的系统,第一次可以进ISP,第二次就不行了;为什么我在Win98下无法进入ISP,换了WinXP就可以了。这些问题总是出现于一些细微的地方,一些被人忽略的地方,如果你没有充足的时间,充足的精力,充足的耐心去寻找这些根源;如果你有一台CP900编程器(当然其他的某些编程器也可以);如果你不想在那块可怜的小电路板上,再挤进一堆器件;如果你不想在购料单上再增加一批Max232,或者一批xx型电容,yy型电阻,那么请使用ICP吧(InCircuit Programming:在电路编程)。

    标签: LPC 900 ICP 单片机

    上传时间: 2013-11-19

    上传用户:pol123

  • MSP430 USB JTAG自制资料

    The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required. The debugging tool interfaces the MSP430 to the included integrated software environment and includes code to start your design immediately.  The MSP-FET430UIF development tools supports development with all MSP430 flash devices

    标签: JTAG MSP 430 USB

    上传时间: 2013-10-28

    上传用户:13691535575

  • ICCAVR自动下载程序

    CCAVR软件有ISP功能,能过调用STK500完成的,只要设置好参数,在ICCAVR中就可以给芯片编程了,还可以让程序一编译完就自动下载到芯片中,相当方便。在Tools->environment options->ISP里设定STK500.exe的路径。— 用于调用STK500程序。在Tools->In system programming 里Programmer Interface中选中STK500。— 选择STK500下载方式。在Tools->In system programming 里把Auto Program After Compile 的小勾选上。— 编译后自动编程。在Tools->In system programming 中还有一些设置项,大家可以根据需要进行相关设置。下面的图片是操作过程。

    标签: ICCAVR 自动 下载程序

    上传时间: 2013-11-17

    上传用户:joseph

  • 51单片机实训指南

    51单片机实训指南:一、 实习课题基于单片机最小系统的频率计设计二、 实习内容单片机最小系统电路原理设计分析与讲解,PCB设计分析与讲解,电路板焊接培训与实际操作,程序设计、调试分析与讲解,程序调试实际操作。三、硬件资源※ 89S51单片机;※ 6位共阳极数码管;※ 段码驱动器74HC573,位选译码器74HC138;※ 4路独立式按键;※ 外部晶振电路;※ ISP下载接口(In system program,在系统编程);※ DC+5V电源试配器(选配);※ ISP下载线(选配);※ 单片机实训模块(频率计分频预处理电路)。四、电路原理分析与设计P1为外部电源输入座(DC+5V),S8为电源最小系统的电源开关,E1和C3为电源滤波,去耦电容。D1为系统电源指示灯。J2为ISP下载接口,S7系统复位按键。CRY1,C1,C2为外部时针电路。IC1为89S51(DIP-40),左上角为第一脚。PRE1,PRE2。为上拉排阻(阻值4.7k—10k)。J5,J9,J6,J10分别对应单片机的P0,P1,P2,P3口。便于二次开发。6路共阳极数码管动态显示电路,P0口通过74HC573(起驱动和隔离作用,让电流通过74CH573流入公共地),来控制数码管的8路段码,P20-P22通过74HC138译码器(使用其中的6路)控制数码管的公共端(中间还有三极管做驱动器)。这样设计的理由:为了保证该单片机最小系统的二次开发的资源充足和合理性。

    标签: 51单片机

    上传时间: 2013-10-14

    上传用户:ryb

  • USB Demonstration for DK3200 w

    The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.

    标签: Demonstration 3200 USB for

    上传时间: 2014-02-27

    上传用户:zhangzhenyu

  • at89c52 pdf

    The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.

    标签: 89c c52 at

    上传时间: 2013-11-10

    上传用户:1427796291

  • 使用jtag接口通过网口烧写程序

    什么是JTAG 到底什么是JTAG呢? JTAG(Joint Test Action Group)联合测试行动小组)是一种国际标准测试协议(IEEE 1149.1兼容),主要用于芯片内部测试。现在多数的高级器件都支持JTAG协议,如DSP、FPGA器件等。标准的JTAG接口是4线:TMS、 TCK、TDI、TDO,分别为模式选择、时钟、数据输入和数据输出线。 JTAG最初是用来对芯片进行测试的,基本原理是在器件内部定义一个TAP(Test Access Port�测试访问口)通过专用的JTAG测试工具对进行内部节点进行测试。JTAG测试允许多个器件通过JTAG接口串联在一起,形成一个JTAG链,能实现对各个器件分别测试。现在,JTAG接口还常用于实现ISP(In-System rogrammable�在线编程),对FLASH等器件进行编程。 JTAG编程方式是在线编程,传统生产流程中先对芯片进行预编程现再装到板上因此而改变,简化的流程为先固定器件到电路板上,再用JTAG编程,从而大大加快工程进度。JTAG接口可对PSD芯片内部的所有部件进行编程 JTAG的一些说明 通常所说的JTAG大致分两类,一类用于测试芯片的电气特性,检测芯片是否有问题;一类用于Debug;一般支持JTAG的CPU内都包含了这两个模块。 一个含有JTAG Debug接口模块的CPU,只要时钟正常,就可以通过JTAG接口访问CPU的内部寄存器和挂在CPU总线上的设备,如FLASH,RAM,SOC(比如4510B,44Box,AT91M系列)内置模块的寄存器,象UART,Timers,GPIO等等的寄存器。 上面说的只是JTAG接口所具备的能力,要使用这些功能,还需要软件的配合,具体实现的功能则由具体的软件决定。 例如下载程序到RAM功能。了解SOC的都知道,要使用外接的RAM,需要参照SOC DataSheet的寄存器说明,设置RAM的基地址,总线宽度,访问速度等等。有的SOC则还需要Remap,才能正常工作。运行Firmware时,这些设置由Firmware的初始化程序完成。但如果使用JTAG接口,相关的寄存器可能还处在上电值,甚至时错误值,RAM不能正常工作,所以下载必然要失败。要正常使用,先要想办法设置RAM。在ADW中,可以在Console窗口通过Let 命令设置,在AXD中可以在Console窗口通过Set命令设置。

    标签: jtag 接口 烧写程序

    上传时间: 2013-10-23

    上传用户:aeiouetla

  • xapp069 - 使用XC9500 JTAG边界扫描接口

    This application note explains the XC9500™/XL/XV Boundary Scan interface anddemonstrates the software available for programming and testing XC9500/XL/XV CPLDs. Anappendix summarizes the iMPACT software operations and provides an overview of theadditional operations supported by XC9500/XL/XV CPLDs for in-system programming.

    标签: xapp 9500 JTAG 069

    上传时间: 2013-11-15

    上传用户:fengweihao158@163.com

  • XAPP424 - 嵌入式JTAG ACE播放器

    This application note contains a reference design consisting of HDL IP and Xilinx AdvancedConfiguration Environment (ACE) software utilities that give designers great flexibility increating in-system programming (ISP) solutions. In-system programming support allowsdesigners to revise existing designs, package the new bitstream programming files with theprovided software utilities, and update the remote system through the JTAG interface using theEmbedded JTAG ACE Player.

    标签: XAPP JTAG 424 ACE

    上传时间: 2013-11-14

    上传用户:JIMMYCB001

  • SOC验证方法

    Prakash Rashinkar has over 15 years experience in system design and verificationof embedded systems for communication satellites, launch vehicles and spacecraftground systems, high-performance computing, switching, multimedia, and wirelessapplications. Prakash graduated with an MSEE from Regional Engineering College,Warangal, in India. He lead the team that was responsible for delivering themethodologies for SOC verification at Cadence Design Systems. Prakash is anactive member of the VSIA Functional Verification DWG. He is currently Architectin the Vertical Markets and Design Environments Group at Cadence.

    标签: SOC 验证方法

    上传时间: 2014-01-24

    上传用户:xinhaoshan2016