Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working environment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.
标签： Creating Machines Mentor State
上传时间： 2013-11-02
上传用户：xauthu
为了在CDMA系统中更好地应用QDPSK数字调制方式，在分析四相相对移相（QDPSK)信号调制解调原理的基础上，设计了一种QDPSK调制解调电路，它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上，进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中，测试结果表明，调制电路能正确选相，解调电路输出数据与QDPSK调制输入数据完全一致，达到了预期的设计要求。 Abstract: In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
上传时间： 2013-10-28
上传用户：jyycc
本文利用Verilog HDL 语言自顶向下的设计方法设计多功能数字钟，突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点，并通过Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成综合、仿真。此程序通过下载到FPGA 芯片后，可应用于实际的数字钟显示中。 关键词：Verilog HDL；硬件描述语言；FPGA Abstract: In this paper, the process of designing multifunctional digital clock by the Verilog HDL top-down design method is presented, which has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Altera QuartusⅡ 4.1 and ModelSim SE 6.0. The program can be used in the truly digital clock display by downloading to the FPGA chip. Keywords: Verilog HDL；hardware description language；FPGA
上传时间： 2013-11-10
上传用户：hz07104032
Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.
上传时间： 2013-11-16
上传用户：萍水相逢
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2014-01-24
上传用户：s363994250
西门子建筑电器-电气安装技术部发行的各类产品样本：小型断路器、剩余电流保护断路器和模数化产品(中/ 英文)Miniature Circuit-Breakers, Residual Current Operated Circuit-Breakers and Modular Devices (Chinese/English)低压熔断器系统(中/ 英文)Fuse System (Chinese/English)雷击，过电压－不再是问题(中文)Thunderstorms - no problem (Chinese)西门子建筑电器目录(中文)Electrical Installation Technology Catalog (Chinese)终端配电保护产品(中文)5 IN 1 (Chinese)SIKUS 和 STAB UNIVERSAL 目录(中文)SIKUS and STAB UNIVERSAL Catalogue (Chinese)SIKUS HC 目录(中文)SIKUS HC Catalogue (Chinese)SentronTM 母线槽 (中文)SentronTM Busway System (Chinese)SentronTM 母线槽系统快速选型 (准备中) (中文)SentronTM Busway System quick selection (in preparing) (Chinese)建筑低压配电一体化解决方案－住宅小区应用(中文)Building LV PD Solution (Chinese)西门子 DELTA vista“远景”系列开关和插座价目表(中文)Delta vista Switch and Socket Pricelist (Chinese)instabus EIB 面向未来的楼宇智能控制系统(中文)instabus EIB (Chinese)instabus EIB 面向未来的楼宇智能控制系统技术手册 (准备中) (中文)instabus EIB technical handbook (in preparing) (Chinese)西门子电气安装技术业绩卓越(中/ 英文)ET Reference Manual (Chinese/English)
上传时间： 2013-11-23
上传用户：瓦力瓦力hong
在Multisim 10软件环境下，设计一种由运算放大器构成的精确可控矩形波信号发生器，结合系统电路原理图重点阐述了各参数指标的实现与测试方法。通过改变RC电路的电容充、放电路径和时间常数实现了占空比和频率的调节，通过多路开关投入不同数值的电容实现了频段的调节，通过电压取样和同相放大电路实现了输出电压幅值的调节并提高了电路的带负载能力，可作为频率和幅值可调的方波信号发生器。Multisim 10仿真分析及应用电路测试结果表明，电路性能指标达到了设计要求。 Abstract: Based on Multisim 10， this paper designed a kind of rectangular-wave signal generator which could be controlled exactly composed of operational amplifier， the key point was how to implement and test the parameter indicators based on the circuit diagram. The duty and the frequency were adjusted by changing the time constant and the way of charging and discharging of the capacitor， the width of frequency was adjusted by using different capacitors provided with multiple switch， the amplitude of output voltage was adjusted by sampling voltage and using in-phase amplifier circuit，the ability of driving loads was raised， the circuit can be used as squarewave signal generator whose frequency and amplitude can be adjusted. The final simulation results of Multisim 10 and the tests of applicable circuit show that the performance indicators of the circuit meets the design requirements.
上传时间： 2014-01-21
上传用户：shen007yue
本程序集是Allen I. Holub所写的《Compiler Design in C》一书的附随软件，其中有作者自己编写的词法分析和语法分析工具LeX，occs和LLama，该软件包还包括一个显示C语言分析过程的程序
上传时间： 2014-01-08
上传用户：siguazgb
PGP Components使用PGP算法的加密控件。(有源代码）工作在：D2 D3 D4 D5。作者：Michael in der Wiesche
标签： Components PGP Michael Wiesche
上传时间： 2013-12-28
上传用户：koulian
a set of cross-platform tools that is useful for programming the GBA written in Java.
标签： cross-platform programming written useful
上传时间： 2015-01-06
上传用户：yd19890720
