VHDL（Very High Speed Integrated Circuit Hardware Description Language）硬件描述语言设计规范讲解
标签： Description Integrated Hardware Language
上传时间： 2014-01-18
上传用户：dyctj
As the Hardware Description Language (HDL) enhancement activities have increased over the past year, so too has the complexity in determining which language(s) are the best tools for designers and organizations to continue using or to adopt. Many designers and organizations are contemplating whether they should switch from one HDL to another.
标签： Description enhancement activities the
上传时间： 2015-12-15
上传用户：sunjet
As the Hardware Description Language (HDL) enhancement activities have increased over the past year, so too has the complexity in determining which language(s) are the best tools for designers and organizations to continue using or to adopt. Many designers and organizations are contemplating whether they should switch from one HDL to another.
标签： Description enhancement activities the
上传时间： 2015-12-15
上传用户：SimonQQ
VHDL（Very-High-Speed Integrated Circuit Hardware Description）
标签： Very-High-Speed Description Integrated Hardware
上传时间： 2015-12-30
上传用户：lht618
VHDL是Very High Speed Integrated Circuit Hardware Description Language的缩写， 意思是超高速集成电路硬件描述语言。对于复杂的数字系统的设计，它有独特的作用。它的硬件描述能力强，能轻易的描述出硬件的结构和功能。这种语言的应用至少意味着两种重大的改变：电路的设计竟然可以通过文字描述的方式完成；电子电路可以当作文件一样来存储。随着现代技术的发展，这种语言的效益与作用日益明显，每年均能够以超过30％的速度快速成长。 这次毕业设计的内容是在简要介绍了VHDL语言的一些基本语法和概念后，进一步应用VHDL，在MAX+plusII 的环境下设计一个电子钟，最后通过仿真出时序图实现预定功能。电子钟的时间显示用到了七段数码管(或称七段显示器)的电路设计，内部的时间控制输出则用到了各种设计，包括：加法计数器，扫描电路，控制秒、分、时的分频电路，各种数制的转换。
标签： Description Integrated Hardware Language
上传时间： 2016-03-08
上传用户：hwl453472107
What is Verilog? ➥ Verilog HDL is a Hardware Description Language (HDL) ➥ Verilog HDL allows describe designs at a high level of abstraction as well as the lower implementation levels ➥ Primary use of HDLs is the simulation of designs ➥ Verilog is a discrete event time simulator What is VeriWell? ➥ VeriWell is a comprehensive implementation of Verilog HDL
标签： Verilog HDL 10149 Description
上传时间： 2017-02-18
上传用户：
SIM300DZ is the Hardware Description of Version 2.04 of the SIMCARD GSM Module. This datasheet corrects some problems that others have.
标签： Description datasheet the Hardware
上传时间： 2017-04-23
上传用户：wangchong
The use of hardware description languages (HDLs) is becoming increasingly common for designing and verifying FPGA designs. Behavior level description not only increases design productivity, but also provides unique advantages for design verification. The most dominant HDLs today are Verilog and VHDL. This application note illustrates the use of Verilog in the design and verification of a digital UART (Universal Asynchronous Receiver & Transmitter).
标签： increasingly description designing languages
上传时间： 2014-01-08
上传用户：小草123
The Verilog Hardware Description Language, 5th Ed
标签： Verilog
上传时间： 2018-04-15
上传用户：MagicJ
·IEEE Std 1364-2001 Standard Verilog hardware description language
标签： nbsp description Standard hardware
上传时间： 2013-06-20
上传用户：虫虫虫虫虫虫
