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full-state-feedback

  • Script to simulate a digital full-state-feedback tracking system.

    Script to simulate a digital full-state-feedback tracking system.

    标签: full-state-feedback simulate tracking digital

    上传时间: 2013-12-23

    上传用户:chenbhdt

  • Analog and Digital Control System Design

    This texts contemporary approach focuses on the concepts of linear control systems, rather than computational mechanics. Straightforward coverage includes an integrated treatment of both classical and modern control system methods. The text emphasizes design with discussions of problem formulation, design criteria, physical constraints, several design methods, and implementation of compensators.Discussions of topics not found in other texts--such as pole placement, model matching and robust tracking--add to the texts cutting-edge presentation. Students will appreciate the applications and discussions of practical aspects, including the leading problem in developing block diagrams, noise, disturbances, and plant perturbations. State feedback and state estimators are designed using state variable equations and transfer functions, offering a comparison of the two approaches. The incorporation of MATLAB throughout the text helps students to avoid time-consuming computation and concentrate on control system design and analysis

    标签: 控制系统

    上传时间: 2021-12-15

    上传用户:

  • This demo shows the BER performance of linear, decision feedback (DFE), and maximum likelihood seque

    This demo shows the BER performance of linear, decision feedback (DFE), and maximum likelihood sequence estimation (MLSE) equalizers when operating in a static channel with a deep null. The MLSE equalizer is invoked first with perfect channel knowledge, then with an imperfect, although straightforward, channel estimation algorithm. The BER results are determined through Monte Carlo simulation. The demo shows how to use these equalizers seamlessly across multiple blocks of data, where equalizer state must be maintained between data blocks.

    标签: performance likelihood decision feedback

    上传时间: 2013-11-25

    上传用户:1079836864

  • If you d like to know where visitors to your site live, add this to your feedback forms. They just c

    If you d like to know where visitors to your site live, add this to your feedback forms. They just choose a region, and the second menu changes appropriately, allowing them to choose their country. (If they choose USA, it allows them to select their state) Neat!

    标签: your feedback to visitors

    上传时间: 2017-06-11

    上传用户:wfeel

  • Two scripts are included here. 1. convsys.m - combines the state space representation of two syst

    Two scripts are included here. 1. convsys.m - combines the state space representation of two systems connected in series. [Ao,Bo,Co,Do]=convsys(A1,B1,C1,D1,A2,B2,C2,D2) This algorithm gives the convolution of two state space representations | A1 B1 | | A2 B2 | u ==> | | ==> | | ==> y | C1 D1 | | C2 D2 | The algorithm also accepts state space objects as inputs and gives out a state space object as output. 2. sysfeedbk.m [Ao,Bo,Co,Do]=convsys(A1,B1,C1,D1,A2,B2,C2,D2) Gives the closed loop state space representation for two systems connected with negative feedback in the following manner. | A1 B1 | u ==> | | ==> y + o | C1 D1 | | - | | | | A2 B2 | | |= | |= | | C2 D2 | The zip file also contains checkcompatibility.m , which checks the compatibility of matrix dimensions in the system and cleanss.m which can be used to clean a state space representation.

    标签: representation included combines scripts

    上传时间: 2017-07-25

    上传用户:semi1981

  • State Machine Coding Styles for Synthesis

      本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state machine types.This paper, "State Machine Coding Styles for Synthesis," details additional insights into statemachine design including coding style approaches and a few additional tricks.

    标签: Synthesis Machine Coding Styles

    上传时间: 2013-10-15

    上传用户:dancnc

  • Design Safe Verilog State Machine(Synplicity)

      One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.

    标签: Synplicity Machine Verilog Design

    上传时间: 2013-10-23

    上传用户:司令部正军级

  • Creating Safe State Machines(Mentor)

      Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working environment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.

    标签: Creating Machines Mentor State

    上传时间: 2013-10-08

    上传用户:wangzhen1990

  • PCB设计经典资料

    本文将接续介绍电源与功率电路基板,以及数字电路基板导线设计。宽带与高频电路基板导线设计a.输入阻抗1MHz,平滑性(flatness)50MHz 的OP增幅器电路基板图26 是由FET 输入的高速OP 增幅器OPA656 构成的高输入阻抗OP 增幅电路,它的gain取决于R1、R2,本电路图的电路定数为2 倍。此外为改善平滑性特别追加设置可以加大噪讯gain,抑制gain-频率特性高频领域时峰值的R3。图26 高输入阻抗的宽带OP增幅电路图27 是高输入阻抗OP 增幅器的电路基板图案。降低高速OP 增幅器反相输入端子与接地之间的浮游容量非常重要,所以本电路的浮游容量设计目标低于0.5pF。如果上述部位附着大浮游容量的话,会成为高频领域的频率特性产生峰值的原因,严重时频率甚至会因为feedback 阻抗与浮游容量,造成feedback 信号的位相延迟,最后导致频率特性产生波动现象。此外高输入阻抗OP 增幅器输入部位的浮游容量也逐渐成为问题,图27 的电路基板图案的非反相输入端子部位无full ground设计,如果有外部噪讯干扰之虞时,接地可设计成网格状(mesh)。图28 是根据图26 制成的OP 增幅器Gain-频率特性测试结果,由图可知即使接近50MHz频率特性非常平滑,-3dB cutoff频率大约是133MHz。

    标签: PCB

    上传时间: 2013-11-13

    上传用户:hebanlian

  • 单片机开发仿真环境keil.c51.v706.Full

    单片机仿真软件,单片机开发仿真环境keil.c51.v706.Full。

    标签: keil Full 706 51

    上传时间: 2014-12-31

    上传用户:lo25643