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dsp<b>builder</b>

  • PSHLY-B回路电阻测试仪

    PSHLY-B回路电阻测试仪介绍

    标签: PSHLY-B 回路 电阻测试仪

    上传时间: 2013-11-05

    上传用户:木子叶1

  • 基于单片机的数字化B超键盘设计

    针对目前使用的RS232接口数字化B超键盘存在PC主机启动时不能设置BIOS,提出一种PS2键盘的设计方法。基于W78E052D单片机,采用8通道串行A/D转换器设计了8个TGC电位器信息采集电路,电位器位置信息以键盘扫描码序列形式发送,正交编码器信号通过XC9536XL转换为单片机可接收的中断信号,软件接收到中断信息后等效处理成按键。结果表明,在满足开机可设置BIOS同时,又可实现超声特有功能,不需要专门设计驱动程序,接口简单,成本低。 Abstract:  Aiming at the problem of the digital ultrasonic diagnostic imaging system keyboard with RS232 interface currently used couldn?蒺t set the BIOS when the PC boot, this paper proposed a design method of PS2 keyboards. Based on W78E052D microcontroller,designed eight TGC potentiometers information acquisition circuit with 8-channel serial A/D converter, potentiometer position information sent out with keyboard scan code sequentially.The control circuit based on XC9536 CPLD is used for converting the mechanical actions of the encoders into the signals that can be identified by the MCU, software received interrupt information and equivalently treatmented as key. The results show that the BIOS can be set to meet the boot, ultrasound specific functionality can be achieved at the same time, it does not require specially designed driver,the interface is simple and low cost.    

    标签: 单片机 B超 数字化 键盘设计

    上传时间: 2013-10-10

    上传用户:asdfasdfd

  • FPGA及DSP+Builder

    DSP+Builder

    标签: Builder FPGA DSP

    上传时间: 2013-11-26

    上传用户:问题问题

  • DE2平台应用及DSP Builder技术

    DE2平台应用及DSP Builder技术

    标签: Builder DE2 DSP

    上传时间: 2013-10-26

    上传用户:非衣2016

  • 基于DSP Builder数字信号处理器的FPGA设计

    基于DSP Builder数字信号处理器的FPGA设计

    标签: Builder FPGA DSP 数字信号处理器

    上传时间: 2013-10-11

    上传用户:zhuyibin

  • 基于DSP Builder数字信号处理器的FPGA设计

    针对使用硬件描述语言进行设计存在的问题,提出一种基于FPGA并采用DSP Builder作为设计工具的数字信号处理器设计方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ设计流程,设计了一个12阶FIR 低通数字滤波器,通过Quartus 时序仿真及嵌入式逻辑分析仪SignalTapⅡ硬件测试对设计进行了验证。结果表明,所设计的FIR 滤波器功能正确,性能良好。 Abstract:  Aiming at the problems in designing DSP using HDL,a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.

    标签: Builder FPGA DSP 数字信号处理器

    上传时间: 2013-11-17

    上传用户:lo25643

  • TKS仿真器B系列快速入门

    TKS仿真器B系列快速入门

    标签: TKS 仿真器 快速入门

    上传时间: 2013-10-31

    上传用户:aix008

  • 一个简单好用的B+树算法实现

    一个简单好用的B+树算法实现

    标签: 算法

    上传时间: 2015-01-04

    上传用户:缥缈

  • 一个用Basic实现的B-Tree算法

    一个用Basic实现的B-Tree算法

    标签: B-Tree Basic 算法

    上传时间: 2013-12-30

    上传用户:ccclll

  • 一个用Java applet实现的B-Tree算法

    一个用Java applet实现的B-Tree算法

    标签: B-Tree applet Java 算法

    上传时间: 2013-12-25

    上传用户:qiao8960