This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express deviceS located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2013-10-15
上传用户：busterman
Abstract: Electrolytic capacitors are notorious for short lifetimes in high-temperature applications such asLED light bulbs. The careful selection of these deviceS with proper interpretation of their specifications isessential to ensure that they do not compromise the life of the end product. This application notediscusses this problem with electrolytic capacitors in LED light bulbs and provides an analysis that showshow it is possible to use electrolytics in such products.
上传时间： 2013-11-17
上传用户：asdfasdfd
The LTP5901 and LTP5902 require little external circuitry, as the deviceS references,decoupling and power supply filtering are integrated. The LTP5901 and LTP5902 will bemodularly certified for operation in the United States (FCC), Canada (IC) and theEuropean Union (CE).
标签： Integration LTP Hardware Guide
上传时间： 2013-11-22
上传用户：sunchao524
Abstract: We don't expect manufacturers to produce clothes that in one size that fits everyone. In thesame way, one ESD component can't solve all issues—each application has different ESD requirements.Knowing that "one size fits all" cannot apply to power design, the power designer, or the engineering"super hero," must consider all the potential disruptions to a steady flow of power and thenvarious waysto mitigate them. This tutorial describes voltage- and current-limiting deviceS and risetime reducers tomanage the power. It also points to free and low-cost software tools to help design lowpass filters, checkcapacitor self-resonance, and simulate circuits.
上传时间： 2013-11-18
上传用户：zhouxuepeng1
Abstract: This article discusses the requirements and design considerations for automotive applications, including those for enginecontrol, infotainment, and body electronics. It also discusses several Maxim deviceS that are ideal for automotive applications.
上传时间： 2013-10-27
上传用户：jiangxiansheng
Power over Ethernet (PoE) is a new development thatallows for the delivery of power to Ethernet-based deviceSvia standard Ethernet CAT5 cable, precluding the need forwall adapters or other external power sources. The PoEspecification defines a hardware detection protocol wherePower Sourcing Equipment (PSE) is able to identify PoEPowered deviceS (PDs), thus allowing full backwardscompatibility with non-PoE-aware (legacy) EthernetdeviceS.
上传时间： 2013-11-11
上传用户：daoyue
Linear Technology offers a variety of deviceS that simplifyconverting power from a USB cable, but the LTC®3455represents the highest level of functional integration yet. The LTC3455 seamlessly manages power flowbetween an AC adapter, USB cable and Li-ion battery,while complying with USB power standards, all from a4mm × 4mm QFN package. In addtion, two high efficiencysynchronous buck converters generate low voltage railswhich most USB-powered peripherals require. TheLTC3455 also provides power-on reset signals for themicroprocessor, a Hot SwapTM output for poweringmemory cards as well as an uncommitted gain blocksuitable for use as a low-battery comparator or an LDOcontroller. The PCB real estate required for the entire USBpower control circuit and two DC/DC converters is only225mm2.
上传时间： 2013-11-02
上传用户：名爵少年
PCI ExpressTM is the third generation of PCI (PeripheralComponent Interconnect) technology used to connect I/Operhipheral deviceS in computer systems. It is intended asa general purpose I/O device interconnect that meets theneeds of a wide variety of computing platforms such asdesktop, mobile, server and communications. It alsospecifies the electrical and mechanical attributes of thebackplane, connectors and removable cards in thesesystems.
上传时间： 2013-11-17
上传用户：squershop
As the performance of many handheld deviceS approachesthat of laptop computers, design complexity also increases.Chief among them is thermal management—how doyou meet increasing performance demands while keepinga compact and small product cool in the user’s hand?For instance, as battery capacities inevitably increase,charge currents will also increase to maintain or improvetheir charge times. Traditional linear regulator-based batterychargers will not be able to meet the charge currentand effi ciency demands necessary to allow a product torun cool. What is needed is a switching-based chargerthat takes just about the same amount of space as a linearsolution—but without the heat.
上传时间： 2013-11-23
上传用户：lu2767
Handheld designers often grapple with ways to de-bounceand control the on/off pushbutton of portable deviceS.Traditional de-bounce designs use discrete logic, fl ipflops, resistors and capacitors. Other designs includean onboard microprocessor and discrete comparatorswhich continuously consume battery power. For highvoltage multicell battery applications, a high voltageLDO is needed to drive the low voltage deviceS. All thisextra circuitry not only increases required board spaceand design complexity, but also drains the battery whenthe handheld device is turned off. Linear Technology addressesthis pushbutton interface challenge with a pairof tiny pushbutton controllers.
上传时间： 2013-11-18
上传用户：ZJX5201314
