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cuRSor

  • Xilinx FPGA集成电路的动态老化试验

      3 FPGA设计流程   完整的FPGA 设计流程包括逻辑电路设计输入、功能仿真、综合及时序分析、实现、加载配置、调试。FPGA 配置就是将特定的应用程序设计按FPGA设计流程转化为数据位流加载到FPGA 的内部存储器中,实现特定逻辑功能的过程。由于FPGA 电路的内部存储器都是基于RAM 工艺的,所以当FPGA电路电源掉电后,内部存储器中已加载的位流数据将随之丢失。所以,通常将设计完成的FPGA 位流数据存于外部存储器中,每次上电自动进行FPGA电路配置加载。   4 FPGA配置原理    以Xilinx公司的Qpro Virtex Hi-Rel系列XQV100电路为例,FPGA的配置模式有四种方案可选择:MasterSerial Mode,Slave Serial Mode,Master selectMAPMode,Slave selectMAP Mode。配置是通过芯片上的一组专/ 复用引脚信号完成的,主要配置功能信号如下:   (1)M0、M1、M2:下载配置模式选择;   (2)CLK:配置时钟信号;   (3)DONE:显示配置状态、控制器件启动;

    标签: Xilinx FPGA 集成电路 动态老化

    上传时间: 2013-11-18

    上传用户:oojj

  • 基于CPLD器件的现代数字系统设计方法

    摘要:介绍了一种利用CPLD芯片设计的数字钟电路,该系统采用自顶向下的层次模块化 设计手段构建电路,代表了BDA的发展趋势。文中结合实例详尽介绍了原理图设计输入方 式以及设计过程。    

    标签: CPLD 器件 数字系统 设计方法

    上传时间: 2013-10-09

    上传用户:15736969615

  • pci e PCB设计规范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    标签: pci PCB 设计规范

    上传时间: 2014-01-24

    上传用户:s363994250

  • This a GUI based system. The GUI is invoked from the command line by typing "ui_start". The GUI is s

    This a GUI based system. The GUI is invoked from the command line by typing "ui_start". The GUI is self explanatory. Tool tips are given in blue color. The cuRSor needs to be positioned on these for detailed explanation. The main file is "runsim.m". In these simulations the SISO option is not explicitly given. This is because the SISO result for a particular type of modulation is shown in every plot for purposes of comparison. This software has been tested on MATLAB version 6.0 and above with signal processing and communication toolbox options.

    标签: GUI The ui_start invoked

    上传时间: 2016-08-24

    上传用户:杜莹12345

  • 一本价值89元

    一本价值89元,由图灵出版社出版的linux经典编程书籍,涉及包括shell,cuRSor,数据库,gtk+,qt等诸多内容

    标签: 价值

    上传时间: 2013-12-15

    上传用户:黄华强

  • //初始化 if(initscr() == NULL) { perror("initcurs") exit(EXIT_FAILURE) } //设置模式

    //初始化 if(initscr() == NULL) { perror("initcurs") exit(EXIT_FAILURE) } //设置模式 cbreak() noecho() keypad(stdscr, TRUE) //建立窗口 win = newwin(h, w, 3, 20) box(win, 0, 0) keypad(win, TRUE) wmove(win, cury, curx) mvaddstr(16, 1, "Press arrow keys to move the cuRSor within the window.\n") mvaddstr(17, 1, "Press q to quit.\n") refresh() wrefresh(win)

    标签: EXIT_FAILURE initcurs initscr perror

    上传时间: 2013-12-20

    上传用户:FreeSky

  • dsp学习资料

    DSP(digital singnal processor)是一种独特的微处理器,是以数字信号来处理大量信息的器件。其工作原理是接收模拟信号,转换为0或1的数字信号,再对数字信号进行修改、删除、强化,并在其他系统芯片中把数字数据解译回模拟数据或实际环境格式。它不仅具有可编程性,而且其实时运行速度可达每秒数以千万条复杂指令程序,源源超过通用微处理器,是数字化电子世界中日益重要的电脑芯片。它的强大数据处理能力和高运行速度,是最值得称道的两大特色

    标签: dsp学习资料

    上传时间: 2015-10-26

    上传用户:plancking

  • 基于51单片机+12864(st7920)的贪吃蛇游戏

    基于51单片机+12864(st7920)的贪吃蛇游戏

    标签: 单片机

    上传时间: 2015-12-10

    上传用户:wh22410

  • DLMS Color Book

    DLMS  编辑 本词条缺少名片图,补充相关内容使词条更完整,还能快速升级,赶紧来编辑吧! 配电线报文规范(Distribution Line Message Specification) [IEC 62056-53]是应用层规范,独立于应用层以下的各个低层,因而也就与通信信道无关,设计用于在计算机集成环境中支持与(能量)分配设备间的消息交换,是由IEC TC57建立并以IEC 61334-4-41发布的国际标准。 中文名 配电线报文规范 外文名 Distribution Line Message Specification) 建立者 IEC TC57 应用领域 于抄表、远程控制以及增值服务等 这个概念被进一步发展成为设备语言报文规范,其目的在于为结构化建模和仪表数据交换提供一个互操作环境,支持任何能量类型如电、水、气或热的计量,应用于远程抄表、远程控制以及增值服务

    标签: IEC62056 DLMS COSEM

    上传时间: 2016-04-07

    上传用户:auqaiss

  • CNC初级教程

    频道 劲爆,看《欢乐颂》第二季 上传 书房 登录 注册 菜单 收藏到书房下载文档 上一页  /386 下一页     全屏    < 返回首页  CNC初级教程/FANUC学校讲义 顶 8 踩 0 浏览 1,196 收藏 89 评论 1 加入豆单 举报 手机观看

    标签: CNC 教程

    上传时间: 2016-05-16

    上传用户:kim123