The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.
标签： translating Level 9517 PCA
上传时间： 2013-12-25
上传用户：wsf950131
The PCA9518 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both thedata (SDA) and the clock (SCL) lines, thus enabling virtuallyunlimited buses of 400 pF.
标签： Expandable 5channel 9518 PCA
上传时间： 2013-10-23
上传用户：dumplin9
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.
上传时间： 2014-01-18
上传用户：bs2005
The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after theboot process has completed.
标签： Stellaris Clocking Options for
上传时间： 2013-10-14
上传用户：pol123
The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
标签： MULTICHANNEL 5.5 TO RS
上传时间： 2013-10-19
上传用户：ddddddd
Designing Boards with Atmel AT89C51, AT89C52, AT89C1051, and AT89C2051 for Writing Flash at In-Circuit Test:Recent improvements in chips andtesters have made it possible for thetester to begin taking over the role traditionallyassigned to the PROM programmer.Instead of having a PROM programmerwrite nonvolatile memoriesbefore assembling the board, the in-circuittester writes them during in-circuittesting operations. Many Teradyne Z18-series testers are now in use loadingcode into nonvolatile memories, microcontrollersand in-circuit programmable logic devices. The purpose of this note is to explain how the Z18 approaches the writing task for Atmel AT89C series IC’s,so that designers of boards using these chips can get the best results.
标签： Designing Boards Atmel with
上传时间： 2013-11-20
上传用户：lijianyu172
基于单片机的步进电机开环控制系统:通过ATMEL89C51单片机对步进电机进行控制,主要介绍了步进电机控制器、驱动电路和LED显示电路的设计,实现了步进电机的开环控制。在步进电机控制器的设计中,重点阐述了脉冲产生电路以及对速度的控制。该系统具有成本低、控制方便的特点。关键词: 单片机; 步进电机; 开环控制 Abstract: The design using ATMEL89C51 single chip to control the step2motor with its controller, driving circuit and LED disp lay circuit to realize step motor open2loop controlwere introduced. For the controller in this design,the circuit to p roduce pulse and the speed controlwere expatiated emphatically. This system possesses features of lower cost, easier control.Key words: single ch ip; step2motor; open2loop con trol
上传时间： 2013-10-13
上传用户：cicizoe
摘要：本水位监测报警器使用5V低压直流电源（也可以用3节5号电池代替）就可以对5~15厘米的水位进行监测，用LED显示和数码管显示水位，并可以对不再此范围内的水位发出报警。主要采用CD4066、74LS86、74LS32、CD4511芯片，再加上数码管、蜂鸣器、发光二极管、电阻这些器件组成一个简单而灵敏的监测报警电路，操作简单，接通电源即可工作。因为大部分电路采用数字电路，所以本水位监测报警器还具有耗能低、准确性高的特点。关键字：译码电路 报警电路 监测电路 Abstract: The water level alarm monitoring the use of 5 V low-voltage DC power (can also use three batteries replaced on the 5th) will be able to 5 to 15 centimeters of water level monitoring, with LED display and digital display of water level, and this can no longer Within the scope of a water level alarm. Mainly CD4066, 74LS86, 74LS32, CD4511 chips, coupled with digital control, buzzer, light-emitting diode, the resistance of these devices composed of a simple and sensitive monitoring alarm circuits. Because the majority of circuits using digital circuitry, so the water level monitored alarm system also has low energy consumption, high accuracy of the characteristics. Keyword: Decoding circuit alarm circuit monitoring circuit
上传时间： 2013-11-05
上传用户：王庆才
基于单片机控制的二氧化碳浓度测试计:基于CDM4161二氧化碳气体浓度测试模块以及ATtiny26单片机,提出了一种二氧化碳浓度测试计的设计方案。该方案具有硬件电路简单、成本低、可靠性高、测量准确等优点，具有较高的实用价值。 Abstract: Abstract：A desigh scheme of CO2 concentration meter based on CDM4161carbon dioxide concentration test module and ATtiny26micro-controller is presented in this paper.The design scheme features simple hardware circuit,low-cost,high reli-ability，accurate measurement and it has a high practical value.
上传时间： 2013-11-14
上传用户：zjwangyichao
In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.
上传时间： 2013-10-08
上传用户：18711024007
