一、版权信息PCI-51XX系列智能CAN接口卡及相关软件均属广州市周立功单片机发展有限公司所有，其产权受国家法律绝对保护，未经本公司授权，其他公司、单位、代理商及个人不得非法使用和拷贝，否则将受到国家法律的严厉制裁。您若需要我公司产品及相关信息，请及时与我们联系，我们将热情接待。广州周立功单片机发展有限公司保留在任何時候修订本用户手册且不需通知的权利。 二、功能特点PCI-51XX智能CAN接口卡是具有PCI接口的高性能CAN总线通讯适配卡，它使PC机方便地连接到CAN总线上，实现CAN2.0B协议的数据通讯。PCI-51XX智能CAN接口卡采用标准PCI接口，实现与主机PC的高速数据交换。接口卡上自带光电隔离模块，使PC机避免由于地环流的损坏，增强系统在恶劣环境中使用的可靠性。PCI-51XX智能CAN接口卡配有可在Win98/Me、Win2000/XP下工作的驱动程序，使用通用CAN接口库，使开发简单化，并包含在VC++、C++Builder、Delphi、VB下开发的详细应用例程。
上传时间： 2013-10-08
上传用户：wangyi39
ACPCI系列的产品就是专为工控机和台式机及其他电脑工程项目和测试调试设计的。和计算机的连接接口是通用的PCI接口，ACPCI是南京来可电子根据多年的CAN总线工程应用经验总结而成的，力求在CAN总线的兼容性、稳定性和标准性上做到最好，ACPCI的单通道发送速度最高大于5000帧/秒，单通道接收速度最高大于7000帧/秒。总线2500V DC-DC隔离，总线接口防雷击浪涌保护，配套有免费的测试软件Adawin CANTest，方便对卡和客户的CAN应用系统进行测试。
上传时间： 2013-11-08
上传用户：born2007
BIOS emulator and interface to Realmode X86 Emulator Library Can emulate a PCI Graphic Controller VGA bios on a powerpc platform
标签： Controller interface emulator Realmode
上传时间： 2015-11-02
上传用户：zjf3110
Peak-CAN控制器(PCI接口)的驱动程序，for linux，兼容SJA1000 CAN设备。
上传时间： 2014-01-10
上传用户：lili123
完整的在Windows下 PCI CAN卡的驱动程序及测试程序
上传时间： 2013-12-23
上传用户：15736969615
一个关于PCI CAN开发板的windows下的驱动程序,用DDK做的,希望对做PCI CAN板的朋友有用
上传时间： 2013-12-14
上传用户：lili123
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2013-10-15
上传用户：busterman
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2014-01-24
上传用户：s363994250
PCI Hot-Plug Specification Revision 1.0 The primary objective of this specification is to enable higher availability of file and application servers by standardizing key aspects of the process of removing and installing PCI adapter cards while the system is running. Although these same principles can be applied to desktop and portable systems using PCI buses, the operations described here target server platforms.
标签： Specification specification objective Hot-Plug
上传时间： 2013-12-09
上传用户：zyt
PCI-to-PCI Bridge Architecture Specification Revision 1.1 This specification establishes the requirements that a PCI-to-PCI bridge must meet to be compliant to this specification and the PCI Local Bus Specification. In addition, the requirements for optional extensions are specified. This specification does not describe the implementation details of any particular requirement or optional feature of a PCI-to-PCI bridge, nor is it a goal of this specification to describe any particular PCI-to-PCI bridge implementation. However, some recommendations are provided for some implementation-specific features that can be provided by a PCI-to-PCI bridge.
标签： Specification specification Architecture establishes
上传时间： 2014-01-14
上传用户：caiiicc
