·详细说明：支持SD卡的MP3电路图,powerpcb4.0格式.使用AVR单片机- Supports SD the cARd the MP3 circuit diagram, the powerpcb4.0 form Uses the AVR monolithic integrated circuit
上传时间： 2013-06-05
上传用户：zhaoq123
·ARM+MP3+USB HOST 开发板(at91sam7s64+vs1003b+ch375v) 1.atmel出品的at91sam7s64作为主控芯片 2.外配vs1003b作为mp3/wma解码器 3.ch375v作usb主机芯片， 4.支持接口 5.sd cARd,mmc cARd 6.cf cARd 7.u盘 8.ide port(连接硬盘，光驱) 9.液晶 10.可通过串口，usb下载程
上传时间： 2013-05-29
上传用户：Yukiseop
ST Cortex-M3高性能评估套件，USB，Ethernet，CAN，MicroSD cARd……
上传时间： 2013-06-20
上传用户：qwe1234
Abstract: Most magnetic read head data sheets do not fully specify the frequency-dependent components andare often vague when specifying other key parameters. In some cases, the specifications of two very similarheads from two different manufacturers might be quite different in terms of parameters specified and omitted.The limitations in the data sheets make designing an optimum cARd reading system unnecessarily difficult andtime consuming. This document outlines a strategy to overcome the above shortcomings and offers guidelinesto overcome the noise issues.
上传时间： 2013-11-13
上传用户：dysyase
A complete design for a data acquisition cARd for the IBM PC is detailed in this application note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Turbo" XT can acquire data at speeds greater than 20kHz. Machines with 80286 and 80386 processors can go faster than 20kHz. The computer that was used as a test bed in this application was an XT running at 4.77MHz and therefore all system timing and acquisition time measurements are based on a 4.77MHz clock speed.
上传时间： 2013-10-29
上传用户：BOBOniu
PCI ExpressTM Architecture Add-in cARd Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
标签： Architecture ExpressTM PCI
上传时间： 2013-11-03
上传用户：gy592333
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in cARd PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in cARd attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in cARd edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2013-10-15
上传用户：busterman
Most portable computers have built-in sockets to acceptsmall PC cARds for use as extended memories, fax modems,network interfaces, wireless communicators and awide assortment of other functions. The Personal ComputerMemory cARd International Association (PCMCIA)has released specifications that outline the general powerrequirements for these cARds.
上传时间： 2013-11-18
上传用户：bcjtao
Abstract: This application note describes how to build, debug, and run applications on the on-board MAXQ622microcontroller to interface with the DS8005 dual smart cARd interface. This is demonstrated in both IAREmbedded Workbench and the Rowley CrossWorks IDE, using sample code provided with the kit.
上传时间： 2013-10-29
上传用户：ddddddd
Keil C51是美国Keil Software公司出品的51系列兼容单片机C语言软件开发系统，与汇编相比，C语言在功能上、结构性、可读性、可维护性上有明显的优势，因而易学易用。Keil提供了包括C编译器、宏汇编、连接器、库管理和一个功能强大的仿真调试器等在内的完整开发方案，通过一个集成开发环境（uVision）将这些部分组合在一起。运行Keil软件需要WIN98、NT、WIN2000、WINXP等操作系统。如果你使用C语言编程，那么Keil几乎就是你的不二之选，即使不使用C语言而仅用汇编语言编程，其方便易用的集成环境、强大的软件仿真调试工具也会令你事半功倍。 指南包含的内容：1.在KEIL中生成*.AMS文件最简单方法、2.在把汇编程序导入KEIL简单方法、3.在KEIL中生成*.HEX16进制文件的方法，4.平凡老师的C语言教程、5.其他一些教程、6.本站全系列在线时时硬件仿真器的使用方法，包括PZ仿真器专业版、A380仿真器、AZ综合系统内含的仿真器使用方法简介。 其中里面包含的有：KEIL 无限制完全破解、KEIL使用指南、仿真软件KEIL使用教程
上传时间： 2013-11-09
上传用户：xuanchangri
