书籍“无线通信fpga设计”里的源代码实例,里面有verilog和MATLAB两种语言实例
上传时间: 2013-08-07
上传用户:jackandlee
Mars-SP3-U FPGA开发板说明,针对Xilinx的XC3S400,有对原理图的说明和实例操作说明
上传时间: 2013-08-15
上传用户:songnanhua
:针对现场可编程门阵列(FPGA)芯片的特点,研究FPGA中双向端口I/O的设计,同时给出仿真初始化双向端口I/O的方法。采用这种双向端口的设计方法,选用Xilinx的Spartan2E芯片设计一个多通道图像信号处理系统。
上传时间: 2013-08-17
上传用户:xiaoyunyun
FPGA设计全流程:Modelsim>>Synplify.Pro>>ISE\\r\\n第一章 Modelsim编译Xilinx库\\r\\n第二章 调用Xilinx CORE-Generator\\r\\n第三章 使用Synplify.Pro综合HDL和内核\\r\\n第四章 综合后的项目执行\\r\\n第五章 不同类型结构的仿真
上传时间: 2013-08-20
上传用户:cuibaigao
在利用FPGA实现数字信号处理方面,分布式算法发挥着关键作用,与传统的乘积-积结构相比,具有并行处理的高效性特点。详细研究了基于FPGA、采用分布式算法实现FIR数字滤波器的原理和方法,并通过Xilinx ISE在Modelsim下进行了仿真。
上传时间: 2013-08-30
上传用户:宋桃子
基于matlab软件开发平台,介绍FPGA开发环境的构建
上传时间: 2013-09-02
上传用户:xhwst
用8031加载ALtera的FPGA,也可用于Xilinx的FPGA的加载
上传时间: 2013-09-06
上传用户:txfyddz
CPLD/FPGA是目前诮用最为广泛的两种可编程专用集成电路(ASIC),特别适合于产品的样品开发与小批量生产。本书从现代电子系统设计的角度出发,以全球著名的可编程逻辑器件供应商Xilinx公司的产品为背景,系统全面地介绍该公司的CPLD/FPGA产品的结构原理、性能特点、设计方法以及相应的EDA工具软件,重点介绍CPLD/FPGA在数字系统设计、数字通信与数字信号处理等领域中的应用。\r\n 本书内容新颖、技术先进、由浅入深,既有关于大规模可编辑逻辑器件的系统论述,又有丰富的设计应用实例。对于从事各类
上传时间: 2013-09-06
上传用户:Maple
中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签: UltraScale Xilinx 架构
上传时间: 2013-11-13
上传用户:瓦力瓦力hong
fpga
上传时间: 2013-12-19
上传用户:wangrong