HIGH SPEED 8051 μC CORE - Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25MHz System Clock - 22 Vectored Interrupt Sources MEMORY - 4352 Bytes Internal Data RAM (256 + 4k) - 64k Bytes In-System Programmable FLASH Program Memory - External Parallel Data Memory Interface – up to 5Mbytes/sec DIGITAL PERIPHERALS - 64 Port I/O; All are 5V tolerant - Hardware SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial Ports Available Concurrently - Programmable 16-bit Counter/Timer Array with 5 Capture/Compare Modules - 5 General Purpose 16-bit Counter/Timers - Dedicated Watch-Dog Timer; Bi-directional Reset CLOCK SOURCES - Internal Programmable Oscillator: 2-to-16MHz - External Oscillator: Crystal, RC, C, or Clock - Real-Time Clock Mode using Timer 3 or PCA SUPPLY VOLTAGE ........................ 2.7V to 3.6V - Typical Operating Current: 10mA @ 25MHz - Multiple Power Saving Sleep and Shutdown Modes 100-Pin TQFP (64-Pin Version Available) Temperature Range: –40°C to +85°C
标签： C8051F020
上传时间： 2013-10-12
上传用户：lalalal
针对目前汽车追尾事件频发问题，提出一种防汽车车前和车后追尾的安全装置设计。该设计以高性能、低功耗的8位AVR微处理器ATmega8L为核心，结合霍尔式车速传感器、激光雷达测距装置和MMA7260QT加速度传感器，能够兼顾车前和车后，摒弃以往设计中只考虑车前或车后单一性缺点，尤其适用于高速、夜晚或新手行车。 Abstract: Aiming at the high frequency of vehicle rear-end collision，a safe device design of anti-vehicle rear-end collision is presented.In the design，the high-performance，low-power8-bit AVR microprocessor ATmega8L is utilized as a core combined with Hall-type speed sensor，laser-radar ranging devices and the acceleration sensor MMA7260QT.The design considers both the front and back of a car，and overcomes the drawbacks of former designs in which only the front or the back of the car is considered，so it is especially suitable for high-speed，night or the beginner’s driving.
上传时间： 2013-10-14
上传用户：GavinNeko
介绍一种基于C8051单片机的动态心电监护系统。该系统由两部分组成：以C8051F320单片机为核心的数据采集装置和以PC机为平台的分析处理系统。硬件电路功耗低，由单片机自带的USB接口将数据传送给PC机。软件平台采用LabVIEW可视化虚拟仪器系统开发平台，将传统仪器的功能模块集成到计算机中，用户可通过修改虚拟仪器的程序改变其功能。采用USB接口实时传输心电数据，并将数据采集模块设计为计算机外设，使该系统高速快捷、小巧便携。 Abstract: In this design，a low-cost ECG electrocardiogram monitoring system is introduced，which consists of two parts:data acquisition device based on C8051F320and PC terminal as the analysis and processing system.The system is low-power consumption，the data is transmitted to the PC terminal by USB interface of the C8051F320.By using the visible virtual instrument system developing platform LabVIEW，the traditional instruments function modules are integrated into the computer，so the user can modify virtual instrument software to change its function to meet their needs.Using USB in-terface to realize real-time ECG data transmission，in addition，ECG data acquisition module is designed as the computer peripheral，which makes the syetem high-speed and portable.
上传时间： 2013-11-13
上传用户：zhangzhenyu
以AVR单片机ATmega8和USB接口器件PDIUSBD12为核心，基于标准的USB1.1协议，设计一种通用USB接口模块，以满足嵌入式系统中对USB接口的需求。对模块的硬件电路或单片机固件程序的硬件接口层稍加修改即可用于其他各种微处理器。该模块可为各种嵌入式系统增加USB接口,实现与USB主机系统通信。 Abstract: Based on AVR microcontroller ATmega8 and USB interface chip PDIUSBD12, a general USB interface module is designed according to USB1.1 protocol for various requirements of embedded systems. Only with few modifications in circuit or hardware abstract layer of firmware, the module can be used on many types of microprocessors. All kinds of embedded systems can realize high speed and stable communication with USB host systems, owing to the facility of this module.
上传时间： 2014-01-08
上传用户：赵云兴
主要介绍构成记忆示波器的STC12C5408AD增强型单片机8通道10位模数转换功能的设置、应用和具体的汇编程序设计，以及PC机串行通讯和图形显示的高速汇编程序的设计要点，并列举实例说明其应用效果。 Abstract: The configuration, applications and the designs for? compiling program of the memorial oscillograph of 10 bits A/D conversation are introduced. It’s bases on STC12C5408AD 8? channels? single-chip? computer? in? enhancement? mode. It also recommends the devising essentials of high speed compiling program for PC serial communication and graphics display, lists examples to explain its effects in using.
上传时间： 2013-10-10
上传用户：adada
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上传时间： 2013-11-15
上传用户：zouxinwang
The PCA82C250 and PCA82C251 are advanced transceiver products for use in automotive and general industrialapplications with transfer rates up to 1 Mbit/s. They support the differential bus signal representation beingdescribed in the international standard for in-vehicle CAN high-speed applications (ISO 11898). Controller AreaNetwork (CAN) is a serial bus protocol being primarily intended for transmission of control related data between anumber of bus nodes.
上传时间： 2013-11-24
上传用户：Alick
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
上传时间： 2014-11-22
上传用户：xcy122677
Although Stellaris microcontrollers have generous internal SRAM capabilities, certain applicationsmay have data storage requirements that exceed the 8 KB limit of the Stellaris LM3S8xx seriesdevices. Since microcontrollers do not have an external parallel data-bus, serial memory optionsmust be considered. Until recently, the ubiquitous serial EEPROM/flash device was the only serialmemory solution. The major limitations of EEPROM and flash technology are slow write speed, slowerase times, and limited write/erase endurance.Recently, serial SRAM devices have become available as a solution for high-speed dataapplications. The N256S08xxHDA series of devices, from AMI Semiconductor, offer 32 K x 8 bits oflow-power data storage, a fast Serial Peripheral Interface (SPI) serial bus, and unlimited write cycles.The parts are available in 8-pin SOIC and compact TSSOP packages.
上传时间： 2013-10-14
上传用户：cxl274287265
Consumer display applications commonly use high-speed LVDS interfaces to transfer videodata. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC)issues within these consumer devices. This application note uses Spartan®-6 FPGAs togenerate spread-spectrum clocks using the DCM_CLKGEN primitive.
上传时间： 2014-12-28
上传用户：yan2267246
