同步技术是跳频通信系统的关键技术之一,尤其是在快速跳频通信系统中,常规跳频通信通过同步字头携带相关码的方法来实现同步,但对于快跳频来说,由于是一跳或者多跳传输一个调制符号,难以携带相关码。对此引入双跳频图案方法,提出了一种适用于快速跳频通信系统的同步方案。采用短码携带同步信息,克服了快速跳频难以携带相关码的困难。分析了同步性能,仿真结果表明该方案同步时间短、虚警概率低、捕获概率高,同步性能可靠。 Abstract: Synchronization is one of the key techniques to frequency-hopping communication system, especially in the fast frequency hopping communication system. In conventional frequency hopping communication systems, synchronization can be achieved by synchronization-head which can be used to carry the synchronization information, but for the fast frequency hopping, Because modulation symbol is transmitted by per hop or multi-hop, it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code, a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code, which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed, and simulation results show that the scheme has the advantages of shorter synchronization time, lower probability of false alarm, higher probability of capture and more reliable of synchronization.
上传时间: 2013-11-23
上传用户:mpquest
Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.
上传时间: 2014-03-25
上传用户:yyyyyyyyyy
The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, industrial, medical, and communicationmarkets. To optimize system power consumption, the LPC315x have multiple powerdomains and a very flexible Clock Generation Unit (CGU) that provides dynamic clockgating and scaling.The LPC315x is implemented as multi-chip module with two side-by-side dies, one fordigital fuctions and one for analog functions, which include a Power Supply Unit (PSU),audio codec, RTC, and Li-ion battery charger.
上传时间: 2014-01-17
上传用户:Altman
ExpressPCB 是一款免费的PCB设计软件,简单实使。可以画双层板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional. Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).
标签: ExpressPCB PCB 设计软件
上传时间: 2013-11-15
上传用户:lchjng
ExpressPCB 是一款免费的PCB设计软件,简单实使。可以画双层板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional. Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).
标签: ExpressPCB PCB 设计软件
上传时间: 2013-10-09
上传用户:1047385479
This application note describes the implementation of a two-dimensional Rank Order filter. Thereference design includes the RTL VHDL implementation of an efficient sorting algorithm. Thedesign is parameterizable for input/output precision, color standards, filter kernel size,maximum horizontal resolution, and implementation options. The rank to be selected can bemodified dynamically, and the actual horizontal resolution is picked up automatically from theinput synchronization signals. The design has a fully synchronous interface through the ce, clk,and rst ports.
上传时间: 2013-12-14
上传用户:逗逗666
Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The core voltages, VCCINT, for most Xilinx FPGAs, rangefrom 1.2V to 2.5V. Some mature products have 3V, 3.3Vor 5V core voltages. Table 1 shows the core voltagerequirement for most of the FPGA device families. TypicalI/O voltages (VCCO) vary from 1.2V to 3.3V. The auxiliaryvoltage VCCAUX is 2.5V for Virtex-II Pro and Spartan-3, andis 3.3V for Virtex-II.
上传时间: 2013-10-22
上传用户:aeiouetla
波长信号的解调是实现光纤光栅传感网络的关键,基于现有的光纤光栅传感器解调方法,提出一种基于FPGA的双匹配光纤光栅解调方法,此系统是一种高速率、高精度、低成本的解调系统,并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计,综合考虑系统的解调精度和FPGA的处理速度给出了基于拉格朗日的曲线拟合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.
上传时间: 2013-10-10
上传用户:zxc23456789
Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.
上传时间: 2013-11-16
上传用户:萍水相逢
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间: 2014-01-24
上传用户:s363994250