PLC 以 其 可靠性高、抗干扰能力强、配套齐全、功能完善、适应性强等特点，广泛应用于各种控制领域。PLC作为通用工业控制计算机，是面向工矿企业的工控设备，使用梯形图符号进行编程，与继电器电路相当接近，被广大工程技术人员接受。但是在实际应用中，如何编程能够提高PLC程序运行速度是一个值得我们思考研究的问题。1 PLC工作原理PLC 与 计 算机的工作原理基本相同，即在系统程序的管理下，通过运行应用程序完成用户任务。但两者的工作方式有所不同。计算机一般采用等待命令的工作方式，而PLC在确定了工作任务并装人了专用程序后成为一种专用机，它采用循环扫描工作方式，系统工作任务管理及应用程序执行都是用循环扫描方式完成的。PLC 有 两 种基本的工作状态，即运行(RUN)与停止(STOP)状态。在这两种状态下，PLC的扫描过程及所要完成的任务是不尽相同的，如图1所示。 PLC在RUN工作状态时，执行一次扫描操作所的时间称为扫描周期，其典型值通常为1一100nis，不同PLC厂家的产品则略有不同。扫描周期由内部处理时间、输A/ 输出处理执行时间、指令执行时间等三部分组成。通常在一个扫描过程中，执行指令的时间占了绝大部分，而执行指令的时间与用户程序的长短有关。用户 程 序 是根据控制要求由用户编制，由许多条PLC指令所组成。不同的指令所对应的程序步不同，以三菱FX2N系列的PLC为例，PLC对每一个程序步操作处理时间为:基本指令占0.741s/步，功能指令占几百微米/步。完成一个控制任务可以有多种编制程序的方法，因此，选择合理、巧妙的编程方法既可以大大提高程序运行速度，又可以保证可靠性。 提高PLC程序运行速度的几种编程方法2.1 用数据传送给位元件组合的方法来控制输出在 PL C应 用编程中，最后都会有一段输出控制程序，一般都是用逻辑取及输出指令来编写，如图2所示。在图2所示的程序中，逻辑取的程序步为1，输出的程序步为2，执行上述程序共需3个程序步。通常情况下，PLC要控制的输出都不会是少量的，比如，有8个输出，在条件满足时要同时输出。此时，执行图2所示的程序共需17个程序步。若我们通过位元件的组合并采用数据传送的方法来完成图2所示的程序，就会大大减少程序步骤。在三 菱 PLC中，只处理ON/OFF状态的元件(如X,Y,M和S)，称为位元件。但将位元件组合起来也可以处理数据。位元件组合由Kn加首元件号来表示。位元件每4bit为一组组合成单元。如K YO中的n是组数，当n=1时，K,Yo 对应的是Y3一Yo。当n二2时，KZYo对应的是Y7一Yo。通过位元件组合，就可以用处理数据的方式来处理位元件，图2程序所示的功能可用图3所示的传送数据的方式来完成。
上传时间： 2013-11-11
上传用户：几何公差
This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in terms of bits per second will remain the same.
上传时间： 2013-11-08
上传用户：lou45566
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
上传时间： 2014-08-16
上传用户：adada
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上传时间： 2013-10-24
上传用户：s蓝莓汁
The LTC®3207/LTC3207-1 is a 600mA LED/Camera driverwhich illuminates 12 Universal LEDs (ULEDs) and onecamera fl ash LED. The ULEDs are considered universalbecause they may be individually turned on or off, setin general purpose output (GPO) mode, set to blink at aselected on-time and period, or gradate on and off at aselected gradation rate. This device also has an externalenable (ENU) pin that may be used to blink, gradate, orturn on/off the LEDs without using the I2C bus. This may beuseful if the microprocessor is in sleep or standby mode. Ifused properly, these features may save valuable memoryspace, programming time, and reduce the I2C traffi c.
上传时间： 2014-01-04
上传用户：LANCE
本软件是关于MAX338, MAX339的英文数据手册：MAX338, MAX339 8通道/双4通道、低泄漏、CMOS模拟多路复用器 The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in both directions. These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-standard DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.
上传时间： 2013-11-12
上传用户：18711024007
电子发烧友讯： 现场总线是指以工厂内的测量和控制机器间的数字通讯为主的网络，也称现场网络。也就是将传感器、各种操作终端和控制器间的通讯及控制器之间的通讯进行特化的网络。原来这些机器间的主体配线是ON/OFF、接点信号和模拟信号，通过通讯的数字化，使时间分割、多重化、多点化成为可能，从而实现高性能化、高可靠化、保养简便化、节省配线(配线的共享)。本文主要讲述了现场总线在工业网络中的应用;现场总线的类别;工业自动化现场总线的分析。 现场总线是允许将分布式控制、监测、检测和管控的设备互连起来的通信系统。由于这项技术，传感器、电磁阀、可编程控制器、电子驱动器和电脑等，便可以很容易地使用一个单一的且不依赖于任一设备制造商的低成本互连交换信息。 图1 多种设备可以连接到现场总线进行数据交换
上传时间： 2014-12-31
上传用户：gut1234567
This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).
上传时间： 2013-11-11
上传用户：gundamwzc
This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in terms of bits per second will remain the same.
上传时间： 2014-01-24
上传用户：15527161163
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
上传时间： 2013-11-01
上传用户：wojiaohs
