用于蛋白质数据生成分类数据的转换。做PSS（Protein Secondary Structure prediction)的可以参考一下。
标签： prediction Secondary Structure Protein
上传时间： 2013-12-22
上传用户：SimonQQ
易飞ERP二次开发接口制作完成 Yi-fei ERP finished Secondary development interface
标签： development ERP Secondary interface
上传时间： 2013-12-08
上传用户：aappkkee
dm6437的NAND Secondary Boot，很好用，有原代码
上传时间： 2013-12-23
上传用户：541657925
二次雷达(Secondary Surveillance Radar)是民航空中管制(Air Traffic Control)和军事敌我识别(Identification Friend or Foe)系统中的关键部分,由于这两个应用领域都要求很高的可靠性和稳定性,因此,二次雷达一直是国内外雷达信号处理领域的研究热点.传统的机载二次雷达应答器普遍采用中小规模集成电路和分立元件设计,其稳定性和可靠性差,实时处理能力也很有限,无法完成高密度、大容量的应答.针对这些缺陷,本论文提出一种全新的应答数字信号处理器硬件结构,即FPGA+DSP的混合结构.这种硬件体系结构的特点是可靠性高,集成度高,通用性强,适于模块化设计,处理速度快,能实时处理多个应答信号,以及进行置信度分析和生成报表.此项目中,本文作者主要负责FPGA部分硬件设计.FPGA主要完成双通道数据采集、产生视频信号和旁瓣抑制信号、计算当前飞机相对本地接收天线的方位和距离、与DSP实时交换数据、上传报表等功能.论文详细分析了接收机信号处理算法在FPGA中的硬件实现方案,在提高系统可靠性、坚固性以及FPGA资源的合理利用方面做了深入的探讨.同时给出不同层次关键模块的HDL实现及其时序仿真结果.
上传时间： 2013-04-24
上传用户：西伯利亚狼
One of the most critical components in a step-up design like Figure 1 is the transformer. Transformers have parasitic components that can cause them to deviate from their ideal characteristics, and the parasitic capacitance associated with the Secondary can cause large resonating current spikes on the leading edge of the switch current waveform.
上传时间： 2013-11-22
上传用户：15070202241
While simplicity and high effi ciency (for cool running) areno longer optional features in isolated power supplies, itis traditionally diffi cult to achieve both. Achieving higheffi ciency often requires the use of advanced topologiesand home-brewed Secondary synchronous rectifi cationschemes once reserved only for higher power applications.This only adds to the parts count and to the designcomplexity associated with the reference and optocouplercircuits typically used to maintain isolation. Fortunately, abreakthrough IC makes it possible to achieve both high efficiency and simplicity in a synchronous fl yback topology.The LT®3825 simplifi es and improves the performance oflow voltage, high current fl yback supplies by providingprecise synchronous rectifi er timing and eliminating theneed for optocoupler feedback while maintaining excellentregulation and superior loop response.
上传时间： 2013-10-16
上传用户：wayne595
Many system designers need an easy way to producea negative 3.3V power supply. In systems that alreadyhave a transformer, one option is to swap out the existingtransformer with one that has an additional Secondarywinding. The problem with this solution is that manysystems now use transformers that are standard, offthe-shelf components, and most designers want toavoid replacing a standard, qualifi ed transformer with acustom version. An easier alternative is to produce thelow negative voltage rail by stepping down an existingnegative rail. For example, if the system already employsan off-the-shelf transformer with two Secondary windingsto produce ±12V, and a –3.3V rail is needed, a negativebuck converter can produce the –3.3V output from the–12V rail.
上传时间： 2013-10-09
上传用户：Jerry_Chow
为了有效地提升铅酸蓄电池的使用寿命，同时实现对充电过程的监控，设计出一种用单片机控制的36 V铅酸蓄电池充电电源。本电路采用反激式拓扑，连续电流工作模式，电源管理IC设计在电源的副边，由ELAN公司的EM78P258N单片机模拟，是用可编程器件模拟电源管理IC，实现智能电源低成本化的一次成功尝试，通过对单片机的软件设计实现了充电电源的状态显示、充电时间控制、报警、过温保护、过压保护、过流保护等功能。本充电器真正的实现了铅酸蓄电池的三段式充电过程，其最高输出功率可达90 W，效率约85%，成本不到20元，具有很高的市场竞争力。 Abstract: In order to extend the life of lead-acid battery efficiently and supervise the charging process meanwhile， a 36V lead-acid battery charge powe supply controlled by microcontroller is designed. The charger is flyback switching power supply and works in CCM mode. A EM78P258N microcontroller made by ELAN microelectronics corporation is used as power management IC which is designed at the Secondary circuit. The project is a successful attempt to low-cost intelligent power used microcontroller simulating power management IC. The charger also has the functions of the status reveal， charge time control， alarming， thermal protect， current limit and overvoltage protect by the software design. The circuit actually implements the three-step charge process， whose power is up to 90W and whose efficiency can get 85%. The net cost of this charger is less than 20 RMB， so that the charger is of powerful market competitiveness.
上传时间： 2013-11-16
上传用户：cepsypeng
In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a Secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.
上传时间： 2013-10-08
上传用户：18711024007
The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.
标签： Demonstration 3200 USB for
上传时间： 2014-02-27
上传用户：zhangzhenyu
