The CAT823, CAT824, and CAT825 provide basic Reset and monitoring functions for the electronic systems. Each device monitors the system voltage and maintains a Reset output until that voltage reaches the device’s specified trip value and then maintains the Reset output active condition until the device’s internal timer, after a minimum timer of 140ms; toallow the systems power supply to stabilize.
上传时间： 2014-11-18
上传用户：BOBOniu
ARM处理器的工作模式 ARM处理器状态 ARM微处理器的工作状态一般有两种，并可在两种状态之间切换：第一种为ARM状态，此时处理器执行32位的字对齐的ARM指令；第二种为Thumb状态，此时处理器执行16位的、半字对齐的Thumb指令。在程序的执行过程中，微处理器可以随时在两种工作状态之间切换，并且，处理器工作状态的转变并不影响处理器的工作模式和相应寄存器中的内容。但ARM微处理器在开始执行代码时，应该处于ARM状态。 ARM处理器状态 进入Thumb状态：当操作数寄存器的状态位（位0）为1时，可以采用执行BX指令的方法，使微处理器从ARM状态切换到Thumb状态。此外，当处理器处于Thumb状态时发生异常（如IRQ、FIQ、Undef、Abort、SWI等），则异常处理返回时，自动切换到Thumb状态。 进入ARM状态：当操作数寄存器的状态位为0时，执行BX指令时可以使微处理器从Thumb状态切换到ARM状态。此外，在处理器进行异常处理时，把PC指针放入异常模式链接寄存器中，并从异常向量地址开始执行程序，也可以使处理器切换到ARM状态。ARM处理器模式 ARM微处理器支持7种运行模式，分别为：用户模式(usr)：ARM处理器正常的程序执行状态。快速中断模式(fiq)：用于高速数据传输或通道处理。外部中断模式(irq)：用于通用的中断处理。管理模式(svc)：操作系统使用的保护模式。数据访问终止模式(abt)：当数据或指令预取终止时进入该模式，可用于虚拟存储及存储保护。系统模式(sys)：运行具有特权的操作系统任务。定义指令中止模式(und)：当未定义的指令执行时进入该模式，可用于支持硬件协处理器的软件仿真。ARM处理器模式 ARM微处理器的运行模式可以通过软件改变，也可以通过外部中断或异常处理改变。大多数的应用程序运行在用户模式下，当处理器运行在用户模式下时，某些被保护的系统资源是不能被访问的。 除用户模式以外，其余的所有6种模式称之为非用户模式，或特权模式；其中除去用户模式和系统模式以外的5种又称为异常模式，常用于处理中断或异常，以及需要访问受保护的系统资源等情况。ARM寄存器 ARM处理器共有37个寄存器。其中包括：31个通用寄存器，包括程序计数器(PC)在内。这些寄存器都是32位寄存器。以及6个32位状态寄存器。 关于寄存器这里就不详细介绍了，有兴趣的人可以上网找找，很多这方面的资料。异常处理 当正常的程序执行流程发生暂时的停止时，称之为异常，例如处理一个外部的中断请求。在处理异常之前，当前处理器的状态必须保留，这样当异常处理完成之后，当前程序可以继续执行。处理器允许多个异常同时发生，它们将会按固定的优先级进行处理。当一个异常出现以后，ARM微处理器会执行以下几步操作：进入异常处理的基本步骤：将下一条指令的地址存入相应连接寄存器LR，以便程序在处理异常返回时能从正确的位置重新开始执行。将CPSR复制到相应的SPSR中。根据异常类型，强制设置CPSR的运行模式位。强制PC从相关的异常向量地址取下一条指令执行，从而跳转到相应的异常处理程序处。如果异常发生时，处理器处于Thumb状态，则当异常向量地址加载入PC时，处理器自动切换到ARM状态。 ARM微处理器对异常的响应过程用伪码可以描述为： R14_ = Return LinkSPSR_= CPSRCPSR[4:0] = Exception Mode NumberCPSR[5] = 0 ；当运行于 ARM 工作状态时If == Reset or FIQ then；当响应 FIQ 异常时，禁止新的 FIQ 异常CPSR[6] = 1PSR[7] = 1PC = Exception Vector Address异常处理完毕之后，ARM微处理器会执行以下几步操作从异常返回：将连接寄存器LR的值减去相应的偏移量后送到PC中。将SPSR复制回CPSR中。若在进入异常处理时设置了中断禁止位，要在此清除。
上传时间： 2013-11-15
上传用户：hanbeidang
CAT24Cxxx是集E2PROM存储器, 精确复位控制器和看门狗定时器三种流行功能于一体的芯片。CAT24C161/162（16K），CAT24C081/082（8K），CAT24C041/042（4K）和CAT24C021/022（2K） 主要作为I2C 串行CMOS E2PROM器件，采用先进的CMOS工艺大大降低了器件的功耗。CAT24Cxxx另一特点是16 字节的页写缓冲区，提供8脚DIP和SOIC封装。CAT24Cxxx的复位功能和看门狗定时器功能保证系统出现故障的时候能给CPU一个复位信号。CAT24Cxxx的第2脚输出低电平复位信号，第7脚输出高电平复位信号。CAT24Cxx1 看狗溢出信号从SDA脚输出CAT24Cxx2不具备看门狗功能
上传时间： 2013-12-12
上传用户：siying
The PCA9537 is a 10-pin CMOS device that provides 4 bits of General Purpose parallelInput/Output (GPIO) expansion with interrupt and Reset for I2C-bus/SMBus applicationsand was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders.I/O expanders provide a simple solution when additional I/O is needed for ACPI powerswitches, sensors, push-buttons, LEDs, fans, etc.
上传时间： 2013-10-14
上传用户：wuchunzhong
The PCA9538 is a 16-pin CMOS device that provides 8 bits of General Purpose parallelInput/Output (GPIO) expansion with interrupt and Reset for I2C-bus/SMBus applicationsand was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders.I/O expanders provide a simple solution when additional I/O is needed for ACPI powerswitches, sensors, push-buttons, LEDs, fans, etc.
上传时间： 2014-01-24
上传用户：youmo81
The PCA9539; PCA9539R is a 24-pin CMOS device that provides 16 bits of GeneralPurpose parallel Input/Output (GPIO) expansion with interrupt and Reset forI2C-bus/SMBus applications and was developed to enhance the NXP Semiconductorsfamily of I2C-bus I/O expanders. I/O expanders provide a simple solution when additionalI/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
上传时间： 2013-11-10
上传用户：ewtrwrtwe
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW Reset input (Reset) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the Reset pin LOW Resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on Resetfunction.
上传时间： 2014-11-22
上传用户：xcy122677
The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW Reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the Reset pin LOW Resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on Reset function.
上传时间： 2013-10-13
上传用户：bakdesec
The outputs of the PCA9518 are immediately available as soon as there is a voltage present on thesupply >~1V and behave as described above. The power-on Reset of the PCA9518A keeps the outputsturned off during power-up and maintains the high impedance of the outputs throughout the power-upcycle. There is an additional built-in delay after power-up that allows the analog circuits to stabilize beforethe part is activated.
标签： Replacement 9518 NXP PCA
上传时间： 2013-10-26
上传用户：13817753084
The Philips family of Multiplexers and Switches consists of bi-directional translating switches controlled via the I2C or SMBus to fan out an upstream SCL/SDA pair to 2, 4 or 8 downstream channels of SCx/SDx pairs. The Multiplexers allow only one downstream channel to be selected at a time, while the Switches allow any individual downstream channel or combination of downstream channels to be selected, depending on the content of the programmable control register. Once one or several channels have been selected, the device acts as a wire, allowing the master on the upstream channel to send commands to devices on all the active downstream channels, and devices on the active downstream channels to communicate with each other and the master. External pull-up resistors are used to pull each individual channel up to the desired voltage level. Combined interrupt output and hardware Reset input are device options that are featured.
上传时间： 2013-10-11
上传用户：dianxin61
