This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to Performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
上传时间： 2013-11-01
上传用户：wojiaohs
Rotates an image by the angle degrees in the % CCW direction. Degrees may be any number. % The function will put degrees in the range 0 % to 360 degrees and then into a range of -45 to 45 % degrees after Performing elementary 90 degree rotations.
标签： direction the Rotates Degrees
上传时间： 2013-12-10
上传用户：sardinescn
We propose and analyze several timestamping of an MPEG-2 Transport Stream transmitted strategies for Performing over a packet-switched network using the PCR-unaware encapsulation scheme, and analyze their effect on the quality of the recovered clock at the MPEG-2 Systems decoder.
标签： timestamping transmitted strategies Transport
上传时间： 2014-12-05
上传用户：450976175
These routines transmit and receive serial data using two general * I/O pins, in 8 bit, No parity, 1 stop bit format. They are useful * for Performing serial I/O on 8051 derivatives not having an * internal UART, or for implementing a second serial channel.
标签： routines transmit receive general
上传时间： 2015-05-22
上传用户：firstbyte
关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, Performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
标签： investigates implementing pipelines circuits
上传时间： 2015-07-26
上传用户：CHINA526
IT++ is a C++ library of mathematical, signal processing and communication system routines/functions. Its main use is in simulation of communication systems or for Performing research in the area of communications.
标签： communication mathematical processing functions
上传时间： 2014-01-13
上传用户：han_zh
Matlab is an ideal tool for simulating digital communications systems, thanks to its easy scripting language and excellent data visualization capabilities. One of the most frequent simulation tasks in the field of digital communications is bit-error- rate testing of modems. The bit-error-rate performance of a receiver is a figure of merit that allows different designs to be compared in a fair manner. Performing bit-error-rate testing withMatlab is very simple, but does require some prerequisite knowledge
标签： communications simulating scripting digital
上传时间： 2014-01-02
上传用户：plsee
The CoinUtils project is a collection of open-source utilities developed and used by a variety of other projects in the COIN-OR repository. The project includes classes for storing and manipulating sparse matrices and vectors, Performing matrix factorization, parsing input files in standard formats, building representations of mathematical programs, comparing floating point numbers with a tolerance, Performing simple presolve operations, and warm starting algorithms for mathematical programs, among others.
标签： open-source collection CoinUtils developed
上传时间： 2013-12-19
上传用户：xmsmh
This handbook is a concise guide to architecting, designing, and building J2EE applications. It guides technical architects through the entire J2EE project, including identifying business requirements, Performing use-case analysis, doing object and data modeling, and leading a development team through construction. Whether you are about to architect your first J2EE application or are looking for ways to keep your projects on-time and on-budget, you will refer to this handbook again and again.
标签： architecting applications designing handbook
上传时间： 2014-08-06
上传用户：xuan‘nian
Atmel’s AT91SAM7FP105 is a low pincount FingerChip processor based on the 32-bit ARM RISC processor. It features a on-chip biometric engine Performing enrollment verification and identification, an internal record cache of up to 25 records and a secure command protocol over USB, SPI, UART. This protocol enables an external host system or processor to control the onchip bioengine functions, manipulate the record cache, and securely export record cache records for external storage. Together with the FingerChip sensor device AT77C104B, it forms an embedded, secured biometric turnkey solution.
标签： processor FingerChip pincount Atmel
上传时间： 2013-12-26
上传用户：shawvi
