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PIPELINE

  • 基于FPGA的FFT数字处理器的硬件实现

    DFT(Discrete Fourier Transformation)是数字信号分析与处理如图形、语音及图像等领域的重要变换工具,直接计算DFT的计算量与变换区间长度N的平方成正比.当N较大时,因计算量太大,直接用DFT算法进行谱分析和喜好的实时处理是不切实际的.快速傅里叶变换(Fast Fourier Transformation,简称FFT)使DFT运算效率提高1~2个数量级.本文的目的就是研究如何应用FPGA这种大规模可编程逻辑器件实现FFT的算法.本设计主要采用先进的基-4DIT算法研制一个具有实用价值的FFT实时硬件处理器.在FFT实时硬件处理器的设计实现过程中,利用递归结构以及成组浮点制运算方式,解决了蝶形计算、数据传输和存储操作协调一致问题.合理地解决了位增长问题.同时,采用并行高密度乘法器和流水线(PIPELINE)工作方式,并将双端口RAM、只读ROM全部内置在FPGA芯片内部,使整个系统的数据交换和处理速度得以很大提高,实际合理地解决了资源和速度之间相互制约的问题.本设计采用Verilog HDL硬件描述语言进行设计,由于在设计中采用Xilinx公司提供的称为Core的IP功能块极大地提高了设计效率.

    标签: FPGA FFT 数字处理器 硬件实现

    上传时间: 2013-06-20

    上传用户:小码农lz

  • 关于FPGA流水线设计的论文

    关于FPGA流水线设计的论文\r\nThis work investigates the use of very deep PIPELINEs for\r\nimplementing circuits in FPGAs, where each PIPELINE\r\nstage is limited to a single FPGA logic element (LE). The\r\narchitecture and VHDL design of a parameterized integer\r\na

    标签: FPGA 流水线 论文

    上传时间: 2013-09-03

    上传用户:wl9454

  • CMOS_PIPELINE_ADC的分析与设计

    关于PIPELINE ADC设计的经典硕士论文

    标签: CMOS_PIPELINE_ADC

    上传时间: 2013-10-16

    上传用户:dingdingcandy

  • 14位PIPELINE ADC设计的带隙电压基准源技术

    关于pineline ADC的设计文献

    标签: PIPELINE ADC 带隙 电压基准源

    上传时间: 2013-11-24

    上传用户:iven

  • 流水线ADC的行为级仿真

    行为级仿真是提高流水线(PIPELINE)ADC设计效率的重要手段。建立精确的行为级模型是进行行为级仿真的关键。本文采用基于电路宏模型技术的运算放大器模型,构建了流水线ADC的行为级模型并进行仿真。为验证提出模型的精度,以一个7位流水线ADC为例,分别进行了电路级与行为级的仿真,并做了对比。结果表明这样构建的行为级模型能较好地反映实际电路的特性,同时仿真时间大大缩短。

    标签: ADC 流水线 仿真

    上传时间: 2013-10-18

    上传用户:zsjinju

  • ADC转换器技术用语 (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    标签: Converter Defi ADC 转换器

    上传时间: 2013-11-12

    上传用户:pans0ul

  • 基于C8051F930的管道温度压力远程监测系统

       为解决输油管道温度压力参数实时监测的问题,设计了以C8051F930单片机作为控制核心的超低功耗输油管道温度压力远程监测系统。现场仪表使用高精度电桥采集数据,通过433 MHz短距离无线通信网络与远程终端RTU进行通信,RTU通过GPRS网络与PC上位机进行远程数据传输,在上位机中实现数据存储和图形化界面显示,从而实现输油管道温度压力参数的实时监测和异常报警。经实验证明,该系统的12位数据采集精度满足设计要求,漏码率小于1%,正常工作时间超过5个月,能实时有效地监测输油管道的温度压力参数,节省大量人工成本,有效预防管道参数异常造成的经济损失和环境污染。 Abstract:  In order to solve the problems on real-time monitoring of PIPELINE temperature and pressure parameters, the ultra-low power remote PIPELINE temperature and pressure monitoring system was designed by using the single chip processor C8051F930 as the control core. The high-precision electric bridge was used in field instruments for data collection, the 433MHz short-range wireless communication network was used to make communication between field instrument and RTU, the GPRS was used by the RTU to transmit data to the PC host computer, and the data was stored and displayed in the PC host computer, so the real-time monitoring and exception alerts of PIPELINE temperature and pressure parameters were achieved. The experiment proves that the system of which error rate is less than 1% over five months working with the 12-bit data acquisition accuracy can effectively monitor the PIPELINE temperature and pressure parameters in real time, it saves a lot of labor costs and effectively prevents environmental pollution and economic losses caused by abnormal channel parameters.

    标签: C8051F930 温度 压力 远程监测系统

    上传时间: 2013-11-07

    上传用户:cuibaigao

  • 一种8位单片机中ALU的改进设计

    文章提出了一种精简指令集8 位单片机中, 算术逻辑单元的工作原理。在此基础上, 对比传统PIC 方案、以及在ALU 内部再次采用流水线作业的332 方案、44 方案, 并用Synopsys 综合工具实现了它们。综合及仿真结果表明, 根据该单片机系统要求, 44 方案速度最高, 比332 方案可提高43.9%, 而面积仅比最小的332 方案增加1.6%。在分析性能差异的根本原因之后, 阐明了该方案的优越性。关键词: 单片机, 精简指令集, 算术逻辑单元, 流水线 Abstract: Work principle for ALU in an 8_bit RISC Singlechip microcomputer is described. The traditional PIC scheme, 332 PIPELINE scheme and 44 PIPELINE scheme are compared on the base of the principle, which are implemented using Synopsys design tools. Results from synthesis and simulation shows that 44 scheme operates the fast, which is 43.9% faster and only 1.6% larger than 332 scheme. The essential reason why the performance is so different is analyzed.Then the advantage of 44 scheme is clarified.Key words: Singlechip, Microcomputer, RISC, ALU, PIPELINE

    标签: ALU 8位单片机

    上传时间: 2013-10-18

    上传用户:xiaoyaa

  • ARM系列处理器体系结构与指令系统详解

        常用的嵌入式处理器有ARM、MIPS、PowerPC、X86、68K/Cold fire等,MIPS是Microprocessor without Inter-locked PIPELINE Stages的缩写,是由MIPS技术公司开发的一种处理器内核标准。目前有32位和64位MIPS芯片。PowerPC是早期Motorola公司和IBM公司联合为Apple公司的MAC机开发的CPU芯片,商标权同时属于IBM和Motorola两家公司,并一度成为他们的主导产品。X86系列处理器起源于Intel架构的8080,然后发展出286、386、486直到现在的奔腾处理器乃至双核处理器等。从嵌入式市场来看,486DX也应该是和ARM、68K、MIPS和SuperH齐名的5大嵌入式处理器之一。Motorola 68K是出现比较早的一款嵌入式处理器,采用的是CISC结构。  

    标签: ARM 列处理器 指令系统

    上传时间: 2013-10-22

    上传用户:dddddd55

  • LPC1850 Cortex-M3内核微控制器数据手册

    The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage PIPELINE and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.

    标签: Cortex-M 1850 LPC 内核微控制器

    上传时间: 2014-12-31

    上传用户:zhuoying119