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PCi-master

  • PCI9052在PCI适配卡设计中研究与应用

    PCI总线是Pentium主机最常见的总线,基于PCI总线形成的CompactPCI和PXI总线广泛地应用在仪器和自动化领域。PCI适配卡的接口设计变得越来越重要。本文对PCI专用接口电路PCI9052的功能进行了研究与分析,并给出了一个应用实例设计。

    标签: PCI 9052 适配卡

    上传时间: 2013-11-02

    上传用户:unmwq

  • PCI-51XX智能CAN接口卡用户手册V1.2

    一、版权信息PCI-51XX系列智能CAN接口卡及相关软件均属广州市周立功单片机发展有限公司所有,其产权受国家法律绝对保护,未经本公司授权,其他公司、单位、代理商及个人不得非法使用和拷贝,否则将受到国家法律的严厉制裁。您若需要我公司产品及相关信息,请及时与我们联系,我们将热情接待。广州周立功单片机发展有限公司保留在任何時候修订本用户手册且不需通知的权利。 二、功能特点PCI-51XX智能CAN接口卡是具有PCI接口的高性能CAN总线通讯适配卡,它使PC机方便地连接到CAN总线上,实现CAN2.0B协议的数据通讯。PCI-51XX智能CAN接口卡采用标准PCI接口,实现与主机PC的高速数据交换。接口卡上自带光电隔离模块,使PC机避免由于地环流的损坏,增强系统在恶劣环境中使用的可靠性。PCI-51XX智能CAN接口卡配有可在Win98/Me、Win2000/XP下工作的驱动程序,使用通用CAN接口库,使开发简单化,并包含在VC++、C++Builder、Delphi、VB下开发的详细应用例程。

    标签: PCI 1.2 CAN 51

    上传时间: 2013-10-08

    上传用户:wangyi39

  • PCA9541 2 to 1 I2C-bus master

    The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.

    标签: master C-bus 9541 PCA

    上传时间: 2013-10-09

    上传用户:3294322651

  • PCI控制器解决方案

    关键词 PCI的总线协议,数据传输摘 要本文档介绍通过 Actel Flash 的FPGA 来实现PCI 的桥接芯片的功能

    标签: PCI 控制器 方案

    上传时间: 2013-10-08

    上传用户:kongrong

  • 基于CPLD的单片机PCI接口设计

    详细阐述一种利用CPLD 实现的8 位单片机与PCI 设备间的通信接口方案,给出用ABEL HDL编写的主要源程序。该方案在实践中检验通过。

    标签: CPLD PCI 单片机 接口设计

    上传时间: 2013-10-30

    上传用户:yeling1919

  • MPC106 PCI Bridge/Memory Contr

    In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.

    标签: Bridge Memory Contr MPC

    上传时间: 2013-10-08

    上传用户:18711024007

  • MPC106 PCI桥/存储器控制器硬件规范说明

    The Motorola MPC106 PCI bridge/memory controller provides a PowerPCªmicroprocessor common hardware reference platform (CHRPª) compliant bridgebetween the PowerPC microprocessor family and the Peripheral Component Interconnect(PCI) bus. In this document, the term Ô106Õ is used as an abbreviation for the phraseÔMPC106 PCI bridge/memory controllerÕ. This document contains pertinent physicalcharacteristics of the 106. For functional characteristics refer to theMPC106 PCI Bridge/Memory Controller UserÕs Manual.This document contains the following topics:Topic PageSection 1.1, ÒOverviewÓ 2Section 1.2, ÒFeaturesÓ 3Section 1.3, ÒGeneral ParametersÓ 5Section 1.4, ÒElectrical and Thermal CharacteristicsÓ 5Section 1.5, ÒPin AssignmentsÓ 17Section 1.6, ÒPinout Listings 18Section 1.7, ÒPackage DescriptionÓ 22Section 1.8, ÒSystem Design InformationÓ 24Section 1.9, ÒDocument Revision HistoryÓ 29Section 1.10, ÒOrdering InformationÓ 29

    标签: MPC 106 PCI 存储器

    上传时间: 2013-11-04

    上传用户:as275944189

  • 从PCI总线的-12V电源获得3.3V电压

    通用的多电源总线,如VME、VXI 和PCI 总线,都可提供功率有限的3.3V、5V 和±12V(或±24V)电源,如果在这些系统中添加设备(如插卡等),则需要额外的3.3V或5V电源,这个电源通常由负载较轻的-12V电源提供。图1 电路,将-12V 电压升压到15.3V(相对于-12V 电压),进而得到3.3V 的电源电压,输出电流可达300mA。Q2 将3.3V 电压转换成适当的电压(-10.75V)反馈给IC1 的FB 引脚,PWM 升压控制器可提供1W 的输出功率,转换效率为83%。整个电路大约占6.25Cm2的线路板尺寸,适用于依靠台式PC机电源供电,需要提供1W输出功率的应用,这种应用中,由于-12V总线电压限制在1.2W以内,因此需要保证高于83%的转换效率。由于限流电阻(RSENSE)将峰值电流限制在120mA,N 沟道MOSFET(Q1)可选用廉价的逻辑电平驱动型场效应管,R1、R2 设置输出电压(3.3V 或5V)。IC1 平衡端(Pin5)的反馈电压高于PGND引脚(Pin7)1.25V,因此:VFB = -12V + 1.25V = - 10.75V选择电阻R1后,可确定:I2 = 1.25V / R1 = 1.25V / 12.1kΩ = 103μA可由下式确定R2:R2 = (VOUT - VBE)/ I2 =(3.3V - 0.7V)/ 103μA = 25.2 kΩ图1 中,IC1 的开关频率允许通过外部电阻设置,频率范围为100kHz 至500kHz,有利于RF、数据采集模块等产品的设计。当选择较高的开关频率时,能够保证较高的转换效率,并可选用较小的电感和电容。为避免电流倒流,可在电路中增加一个与R1串联的二极管。

    标签: PCI 3.3 12 总线

    上传时间: 2013-10-17

    上传用户:jixingjie

  • Create a 1-Wire Master with Xilinx PicoBlaze

    Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.

    标签: PicoBlaze Create Master Xilinx

    上传时间: 2013-11-05

    上传用户:a6697238

  • 基于CH365的PCI总线运动控制卡的设计

    为实现基于PCI总线的运动控制,设计了一款以国产芯片CH365为核心的运动控制卡,给出设计原理图,开发基于DOS的开源驱动函数库和基于Windows的驱动程序及动态链接库,并对运动控制卡驱动程序的编写做了详细的介绍,对中断服务程序的工作流程也做了完整的说明,通过这些函数库及驱动程序,可方便地对伺服电机进行步进式及脉冲式控制,实现各种方向连续的曲线加工和速度控制。经测试,设计的运动控制卡在实时性、可靠性、插补速度和加工精度方面都有较大的优势,具有较好的应用前景。

    标签: 365 PCI CH 总线

    上传时间: 2013-11-09

    上传用户:yeling1919