随着系统设计复杂性和集成度的大规模提高，电子系统设计师们正在从事100MHZ以上的电路设计，总线的工作频率也已经达到或者超过50MHZ，有一大部分甚至超过100MHZ。目前约80% 的设计的时钟频率超过50MHz，将近50% 以上的设计主频超过120MHz，有20%甚至超过500M。当系统工作在50MHz时，将产生传输线效应和信号的完整性问题；而当系统时钟达到120MHz时，除非使用高速电路设计知识，否则基于传统方法设计的PCB将无法工作。因此，高速电路信号质量仿真已经成为电子系统设计师必须采取的设计手段。只有通过高速电路仿真和先进的物理设计软件，才能实现设计过程的可控性。传输线效应基于上述定义的传输线模型，归纳起来，传输线会对整个电路设计带来以下效应。 · 反射信号Reflected signals · 延时和时序错误Delay & Timing errOrs · 过冲(上冲/下冲)Overshoot/Undershoot · 串扰Induced Noise (Or crosstalk) · 电磁辐射EMI radiation
上传时间： 2013-11-05
上传用户：tzrdcaabb
The LogiCOrE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one Or mOre GTP transceivers to be configured using pre-definedtemplates fOr popular industry standards, Or from scratch, to suppOrt a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench fOr rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconfOrm to industry standard protocols usingpredefined templates, Or tailOr the templates fOrcustom protocols• Included protocol templates provide suppOrt fOr thefollowing specifications: AurOra, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
标签： Transceiver Virtex Wizar GTP
上传时间： 2013-10-20
上传用户：dave520l
GAL(generic array logic)是美国晶格半导体公 司(gem 0udu Or)最新推出的可电擦写、可重复编 程、可加密的一种可编程逻辑器件(PLD)。这是第二 代PAL， 亦是目前最理想的可多次编程的逻辑电路。 它不象PAL是一次性编程，品种乡 也不像EPSOM 需要用紫外线照射擦除。GAL 电路能反复编程 采用 的是电擦除技术 可随时进行修改，其内部有一个特殊 结构控制字，使它芯片类型少，功能全。目前普遍果用 的芯片只有两种：GAL16VS(20 g『脚)和GAL20V8 (24号『脚) 这两种GAL能仿真所有的PAL，并能按 设计者自己的需要构成各种功能的逻辑电瑞在研制 开发新的电路系统时 极为方便。
标签： GAL
上传时间： 2013-10-20
上传用户：9牛10
USB接口控制器参考设计,xilinx提供VHDL代码 usb xilinx vhdl ; This program is free software; you can redistribute it and/Or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 2 of the License, Or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY Or FITNESS FOr A PARTICULAR PURPOSE. See the ; GNU General Public License fOr mOre details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
上传时间： 2013-10-29
上传用户：zhouchang199
UART 4 UART参考设计，Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit pOrtion of uart rcvr.vhd - - receive pOrtion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behaviOr, they do not instantiate the DUT. This can easily be done in a top-level VHDL file Or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench fOr txmit.vhd. rcvr_tf.vhd -- Test bench fOr rcvr.vhd.
上传时间： 2013-11-02
上传用户：18862121743
Silicon Motion, Inc. has made best effOrts to ensure that the infOrmation contained in this document is accurate andreliable. However, the infOrmation is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. fOr the use of this infOrmation, nOr fOr infringements of patents Or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,Or transmitted in any fOrm, without the priOr written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
标签： GUIDELINES LAYOUT 320 PCB
上传时间： 2013-10-10
上传用户：manga135
Integrated EMI/Thermal Design fOrSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements fOr the degree of Integrated EMI/Thermal Design fOrSwitching Power SuppliesWei Zhang(ABSTRACT)This wOrk presents the modeling and analysis of EMI and thermal perfOrmancefOr switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfOr EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically Or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted fOr the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built fOr the components. Thermal perfOrmance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductOr design examples are checkedfrom both the EMI and thermal point of view. Insightful infOrmation is obtained.
上传时间： 2013-11-16
上传用户：萍水相逢
This document provides practical, common guidelines fOr incOrpOrating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer Or mOre server baseboard designs. Guidelines and constraints in this document are intended fOr use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connectOr. This document is intended to cover all majOr components of the physical interconnect including design guidelines fOr the PCB traces, vias and AC coupling capacitOrs, as well as add-in card edge-finger and connectOr considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate perfOrmance of the interconnect fOr all layouts and implementations. TherefOre, designers should consider modeling and simulation of the interconnect in Order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight impOrtant constraints, while the narrative that follows offers additional insight.
上传时间： 2014-01-24
上传用户：s363994250
Abstract: Many modern industrial, medical, and commercial applications require temperature measurements in the extended temperature rangewith accuracies of ±0.3°C Or better, perfOrmed with reasonable cost and often with low power consumption. This article explains how platinumresistance temperature detectOrs (PRTDs) can perfOrm measurements over wide temperature ranges of -200°C to +850°C, with absolute accuracyand repeatability better than ±0.3°C, when used with modern processOrs capable of resolving nonlinear mathematical equation quickly and costeffectively. This article is the second installment of a series on PRTDs. FOr the first installment, please read application note 4875, "High-Accuracy Temperature Measurements Call fOr Platinum Resistance Temperature DetectOrs (PRTDs) and Precision Delta-Sigma ADCs."
上传时间： 2013-11-06
上传用户：WMC_geophy
Delta-sigma ADCs, with their high accuracy and high noiseimmunity, are ideal fOr directly measuring many typesof sensOrs. Nevertheless, input sampling currents canoverwhelm high source impedances Or low-bandwidth,micropower signal conditioning circuits. The LTC®2484family of delta sigma converters solves this problem bybalancing the input currents, thussimplifying Or eliminatingthe need fOr signal conditioning circuits.
上传时间： 2015-01-03
上传用户：潜水的三贡
