Implement of SRM Position Check ing Ar ithmetic Ba sed on FPGA
标签： Implement Position ithmetic Check
上传时间： 2013-08-22
上传用户：z1191176801
Run Pac-man Game Based on 8086/8088 FPGA IP Core
上传时间： 2013-08-23
上传用户：JamesB
usb_cpld_code.zip usbjtag - Variations on the implementation of a USB JTAG adapter.
标签： implementation usb_cpld_code Variations adapter
上传时间： 2013-08-31
上传用户：ruan2570406
something useful for communication,source code based on FPGA
标签： communication something useful source
上传时间： 2013-08-31
上传用户：maizezhen
On the design of an FPGA-Based OFDM modulator for IEEE 802.11a
标签： FPGA-Based modulator 802.11 design
上传时间： 2013-09-02
上传用户：zjwangyichao
protel s help on line
上传时间： 2013-09-18
上传用户：iswlkje
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
上传时间： 2013-10-25
上传用户：banyou
Abstract: This application note presents an overview of the operational characteristics of accurate I²C real-time clocks (RTCs),including the DS3231, DS3231M, and DS3232. It focuses on general application guidelines that facilitate use of device resources forpower management, I²C communication circuit configurations, and I²C characteristics relative to device power-up sequences andinitializations. Additional discussions on decoupling are provided to support developing strategies for mitigating power-supply pushingof device frequency.
上传时间： 2013-11-23
上传用户：WMC_geophy
The STM32F10xxx microcontroller family embeds up to three advanced 12-bit ADCs (depending on the device) with a conversion time down to 1 μs. A self-calibration feature is provided to enhance ADC accuracy versus environmental condition changes.
上传时间： 2014-12-23
上传用户：eastimage
A complete design for a data acquisition card for the IBM PC is detailed in this application note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Turbo" XT can acquire data at speeds greater than 20kHz. Machines with 80286 and 80386 processors can go faster than 20kHz. The computer that was used as a test bed in this application was an XT running at 4.77MHz and therefore all system timing and acquisition time measurements are based on a 4.77MHz clock speed.
上传时间： 2013-10-29
上传用户：BOBOniu
